In NOR each byte is individually addressable for reading and writing; each bit is essentially constructed seperately on the die.
Each NOR transistor has an address line and a bit line - when it's address line is asserted, if the flash cell is charged the transistor will pull the output of the chip low. i.e. it's a wired 'NOR' effect.
NAND is more compact. It achieves this by combining bits into blocks of bits, consisting of transistors in series (32 or more in each string). The transistors are by default 'on' pulling the output low, but when an individual one in the string is deactivated, then if discharged may go open circuit, allowing the output to float up.
The problem is that you have to activate the whole string, then strobe the data out of the string into a shift register, before you can get it out. Additionally, because in NOR each transistor has a low resistance when switched on, slew rates on teh output are high - but because of the long series strings in NAND, resistances and slew rates are much degraded.
So, with NAND, the design forces you into blockwise access, with a long random access time to activate a block (up to 250-1000x as long as random access on NOR). Similarly, erases and writes can be performed in blockwise fashion - whereas in NOR, they must be performed sequentially.