Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel)

[DisEnchantment]

TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.


N7 performance is more or less understood.


This year and next year TSMC is mainly increasing capacity to meet demands.

TSMC Radically Boosts CapEx to Expand Production Capacities, To Reach $14B For 2019

www.anandtech.com

For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

Samsung’s Aggressive EUV Plans: 6nm Production in H2, 5nm & 4nm On Track

www.anandtech.com

Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

 

[FlameTail]

I didn't know there was a "4LPX", I assumed that was your typo, and ignored the difference in my reply. Geekerwan's video claims his comparison is made with 4LPE not 4LPX.

Oh not at all. 4LPX is a very real node, XD.

"https://www.semianalysis.com/p/samsung-electronics-cultural-issues?s=r

What we do know for sure, that Qualcomm is angry with Samsung. Qualcomm used a variant of the Samsung 5nm node which was dubbed 4LPX rather than the denser 4LPE node like Exynos 2200 according to TechInsights. We also have been told by multiple sources that parametric yields for the S888 and S8G1 processors were quite poor leading to Qualcomm needing to push these SOCs to way higher power levels to achieve certain performance targets.

While the reported yields for Qualcomm's S8G1 are not quite as low as the Exynos 2200, they aren't anywhere near adequate. As a side note, this works out fine for Qualcomm (and Nvidia). We have been told these two customers have negotiated to pay per yielded die rather than fabricated. per wafer"


Which Geekerwan video? In one he mistakenly labelled the Snapdragon 8 gen 1 as being made on 4LPE but later he admitted the error and said it was 4LPX.

 

[Henry swagger]

https://twitter.com/i/web/status/1707314531280511241

. N3b true density

 

[FlameTail]

When is A17 Pro die shot analysis coming?

 

[eek2121]

When is A17 Pro die shot analysis coming?

soon (tm)

 

[FlameTail]

soon (tm)

Ooo

Who will be publishing it?

 

[FlameTail]

Also I wish there was some proper die shot analysis of recent Snapdragon and Dimensity SoCs. Such interesting chips.

 

[eek2121]

https://twitter.com/i/web/status/1707314531280511241

. N3b true density

When people talk about how Intel failed, I will always remind them that TSMC has made significant missteps as well. N3 was supposed to be 300 mtr/mm2, give or take depending on libraries used. N3 in practice isn’t much better (in terms of density) than N5 and costs significantly more. Even if you exclude SRAM and the analogue parts of the choip.

 

[Mopetar]

Any ideas what went wrong? Is it an issue of the machines being unable to reach that density or just too much variability or other quantum weirdness preventing it from achieving reliable yields if anyone goes that sense?

 

[Ajay]

When people talk about how Intel failed, I will always remind them that TSMC has made significant missteps as well. N3 was supposed to be 300 mtr/mm2, give or take depending on libraries used. N3 in practice isn’t much better (in terms of density) than N5 and costs significantly more. Even if you exclude SRAM and the analogue parts of the choip.

Actual xtor densities are always lower than FAB specs. Too lazy atm to to compare those three SoCs.

 

[FlameTail]

So is Intel 4 denser than TSMC N3B?

 

[H433x0n]

So is Intel 4 denser than TSMC N3B?

With a caveat that it’s only for the HP library. TSMC’s N3B HD library is supposed to be more dense than Intel 3 (Intel 4 doesn’t include an HD library).

 

[dttprofessor]

N3B is over.

 

[moinmoin]

N3B is over.

Long live N3E, or something? Was pretty clear from early on that N3B will be another short lived node akin to N7+.

 

[Antey]

N3B is over.

FinFET is over

 

[Ajay]

FinFET is over

Yep, and GAA is just a Band-Aid

 

[Panino Manino]

Is Murrica starting to become concerned about the progress of the Chinese fabs?

U.S. to Extend Permission for Samsung and SK Hynix to Export New Tools to China

But there is a catch

www.tomshardware.com

Seems like Chinese companies like Huawei will be able to buy memory chips from the Koreans again.

 

[lightisgood]

Intel’s New Fab in Ireland Begins High-Volume Production of Intel 4...

Intel deploys extreme ultraviolet lithography in high-volume manufacturing; use of the technology in Ireland is a first for mass production in Europe.

www.intel.com

Intel's Fab34 started Intel 4 HVM in this week.
I'm interested in the wafer capacity of Fab34...

 

[DrMrLordX]

When people talk about how Intel failed, I will always remind them that TSMC has made significant missteps as well. N3 was supposed to be 300 mtr/mm2, give or take depending on libraries used. N3 in practice isn’t much better (in terms of density) than N5 and costs significantly more. Even if you exclude SRAM and the analogue parts of the choip.

N3B is turning out to be a bit of a dud, but TSMC has done pretty well otherwise since N7.

Is Murrica starting to become concerned about the progress of the Chinese fabs?

Can we not do this? It's one thing to wonder if Intel or GF are "concerned" about competition, but otherwise we risk turning this into a P&N thread.

Seems like Chinese companies like Huawei will be able to buy memory chips from the Koreans again.

Based on the Mate 60 Pro, it looks like they're already buying them from Korean companies.

 

[Ajay]

Can we not do this? It's one thing to wonder if Intel or GF are "concerned" about competition, but otherwise we risk turning this into a P&N thread.

It’s not so much about protectionism (though that’s the part we don’t say out-loud). It’s more importantly about Geopolitics and Global economics. So, yeah, totally a P&N topic. I should get a fireproof suit and start a thread there.

 

[Dayman1225]

Intels future fab expansions expected HVM timeline

 

[trivik12]

So Oregon is just for development?

 

[Markfw]

So Oregon is just for development?

I can say personally ( I live right next to the facility) that a lot more than development must be going on in there. Its many square MILES of buildings. The manufacturing end must be large also. The power grid around it is insane.

Just one picture. The building in the middle is 8-10 stories tall. This picture belies the actual size.


Another. You can't even make out cars, as they are so tiny compared to the building.

 

[lightisgood]

So Oregon is just for development?

GMP (=Intel Fab D1) isn't only for development but also HVM.

source:

Intel Ireland Begins Intel 4 Production (Replay)

Watch as Intel leaders announce the start of high-volume manufacturing on the Intel 4 process technology at Fab 34 in Leixlip, Ireland.

www.intel.com

 

[MadRat]

I can say personally ( I live right next to the facility) that a lot more than development must be going on in there. Its many square MILES of buildings. The manufacturing end must be large also. The power grid around it is insane.

Just one picture. The building in the middle is 8-10 stories tall. This picture belies the actual size.
View attachment 86525

Another. You can't even make out cars, as they are so tiny compared to the building.
View attachment 86526

You think those are big factories? You have never seen major factories then because although large they have nothing on food producers, which in turn have nothing on the heavy industrial giants. The big boys have their own rail systems moving through and around them.

 

[controlflow]

You think those are big factories? You have never seen major factories then because although large they have nothing on food producers, which in turn have nothing on the heavy industrial giants. The big boys have their own rail systems moving through and around them.

It isn't exactly a rail system but I think it is a lot more interesting.
Since this video, they completed a large expansion of D1 and have another one planned supposedly.

D1 in Oregon is indeed both development and HVM.