At the same website they talk about the yields of leading edge nodes of Samsung. And the "reports" of 20-30% yields were false. And now are much more improved.
FlameTail
Senior member
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Source ?
Exact figures aside, it isn't hard to believe they were having poor parametric yields, because evidence being that the chips that came out of the fab underperformed. Obviously, yields improve over time, so I am not sure what you are pointing to.
biostud
Lifer
- Feb 27, 2003
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Anyone looking for a new job?
Intel Foundry Services Chief Steps Down | Tom's Hardware (tomshardware.com)
Intel Foundry Services Chief Steps Down | Tom's Hardware (tomshardware.com)
DrMrLordX
Lifer
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. . . huh. At first it seemed like things might be going really badly for IFS, but now it's starting to look more like Intel is getting ready to spin off their foundry services.
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China might disagree. If China disagrees then Intel would have to think hard before risking 30% revenue of their total revenue from there.
China's Revenge: The Tower Semiconductor Deal is in a Tough Place
Given the Rogers Deal Break, Tower Semi and Intel seem unlikely to go through.
www.fabricatedknowledge.com
Not a big deal according to Ian:
FlameTail
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They are going to spin off their foundry services?
But why? Isn't having your own foundry an advantage?
biostud
Lifer
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I think it is so that external partners can produce their chips at Intel foundries.
They've publicly pushed back hard at speculation that they will spin off IFS, but that doesn't stop the rumors. Bear in mind it's just people observing Intel's actions under a lens of "if they were to spin off the fabs, this is something they'd do". But that not-so-coincidentally has a lot of overlap with running IFS in general.
It'll be more like Alphabet ( parent company of Google/Youtube/Waymo ) or Samsung's business units. Intel Corp ( parent company ) will own IFS and IDM as separate business units.
Samsung to make 3 nm chips for Nvidia, Qualcomm, IBM, Baidu - KED Global
Samsung executives hold semiconductor wafers made with 3-nanometer tech Samsung Electronics Co., the world’s largest memory chipmaker, will make semicond
www.kedglobal.com
FlameTail
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As long as their 3nm doesn't underperform and become a flop.Nvidia 5000 series on 3nm gaa .. looks promisingSamsung to make 3 nm chips for Nvidia, Qualcomm, IBM, Baidu - KED Global
Samsung executives hold semiconductor wafers made with 3-nanometer tech Samsung Electronics Co., the world’s largest memory chipmaker, will make semicondwww.kedglobal.com
I feel like 3nm is Samsung's last chance to fight back against TSMC and stay competitive. If their 3nm flops, it will be end of an era for Samsung Foundry as a cutting edge fab.
I am basing this on the fact that ASML CEO once stated -as I remember- that eventually one player will have to drop out of the leading edge foundry race.
Edit: As I said, this is my opinion personally, and I might be terribly wrong on this count. If you disagree, tell me what you think🤔
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DrMrLordX
Lifer
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The more TSMC wafers they take, the more their own fabs will become a lodestone about their neck. 10nm was a disaster for the company in numerous ways, despite the fact that they eventually salvaged some working products from that fiasco. If Intel 4 (and Intel 3) turns out to be anywhere near as bad, it could take the entire company with it. Isolating their fabs from every other part of the business gives them a chance to shift losses and preserve some part of the company.
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N3/E F12P8 is almost done
N3/E F18P4/5/6 already done. F18P7 progressing well.
N3/E F18P8 seems not much progress. Instead F14P8 progressing much better.
All in all for N3 (excluding F18P4 which conducted risk N3 production)
Interesting notes
BTW, incredible speed of the construction of F12P8.
Will check back in 6 months on F18P8 and F12P9.
*Google Maps take many quarters to update satellite imagery for obvious reasons. Live data is actually costly.
N3/E F18P4/5/6 already done. F18P7 progressing well.
N3/E F18P8 seems not much progress. Instead F14P8 progressing much better.
All in all for N3 (excluding F18P4 which conducted risk N3 production)
- F18P5/6 structurally completed (already committed to HVM 2H22).
- F18P7 structurally to be completed.
- F18P8 started but seems to be halted or at least slow progression
- F12P8 structurally almost completed (Rumored to handle Intel only wafers)
- F12P9 is halted (Rumored to handle Intel only wafers)
Interesting notes
- Contrary to earlier rumors, F12P8 seems to be a full sized Fab similar to the F18 series instead of the previous rumors of being sized around F14 series. F18 series are designed to handle 30-40K wpm.
- F12P9 indeed halted, suggesting Intel delayed or reduced the planned intake of N3 wafers or industrialization deferred.
BTW, incredible speed of the construction of F12P8.
Will check back in 6 months on F18P8 and F12P9.
*Google Maps take many quarters to update satellite imagery for obvious reasons. Live data is actually costly.
FlameTail
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Samsung adds Nvidia, Qualcomm and IBM to its 3 nm customer list, despite abysmal yields
To improve the 3 nm yields that are barely reaching 20%, Samsung started working with US-based company Silicon Frontline Technology that specializes in electrostatic discharge prevention methods. Samsung is also developing a second generation 3 nm node, but it is unclear which stepping will be...
www.notebookcheck.net
Looks like Samsung going full steam ahead with 3nm. Still, the yields situation is concerning. I hope they can fix it.
"Second generation" 3nm node without a working first generation node sounds, to me, like they are brewing up a version of their 3nm node that removes the most troublesome part and adds a few tweaks learned trying to get vanilla 3nm going as a fall back in case they can't get 3nm to acceptable yields.
The big unknown is what is causing the low yields. Is it related to the GAA transistor stack (in which case "tweaking" may not be enough to make much of a difference) or is it something where relaxing the design rules a bit will help (which it seems is what TSMC did with N3E)
This may be why TSMC is taking a more measured approach with N2, with the first GAA node offering only a minimal shrink from the N3 family. Trying to turn too many knobs too far and at once caused much of Intel's 10nm woes, and may be what is biting Samsung with 3GAE. TSMC's N3E may be a less dire example of the same thing, hence the stepwise N2 rollout.
NostaSeronx
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The internal node was the 4nm one.
When it was called this in the 2017 roadmap:
"4LPP (4nm Low Power Plus): 4LPP will be the first implementation of next generation device architecture – MBCFET structure (Multi Bridge Channel FET). MBCFET is Samsung’s unique GAAFET (Gate All Around FET) technology that uses a Nanosheet device to overcome the physical scaling and performance limitations of the FinFET architecture."
- https://news.samsung.com/global/samsung-set-to-lead-the-future-of-foundry-with-comprehensive-process-roadmap-down-to-4nm
[11 new chipmaking fabs that would create 10,000 jobs and account for an investment of about $192 billion.] <-- multiple sources, with different calculated values.
When it was called this in the 2017 roadmap:
"4LPP (4nm Low Power Plus): 4LPP will be the first implementation of next generation device architecture – MBCFET structure (Multi Bridge Channel FET). MBCFET is Samsung’s unique GAAFET (Gate All Around FET) technology that uses a Nanosheet device to overcome the physical scaling and performance limitations of the FinFET architecture."
- https://news.samsung.com/global/samsung-set-to-lead-the-future-of-foundry-with-comprehensive-process-roadmap-down-to-4nm
The bad yield rumors aren't coming from Korea but Taiwan apparently. It is really silly since Samsung announced the 11? future fabs in Texas, specifically for 3GAE and lower.
[11 new chipmaking fabs that would create 10,000 jobs and account for an investment of about $192 billion.] <-- multiple sources, with different calculated values.
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