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Discussion Leading Edge Foundry Node advances (TSMC, Samsung Foundry, Intel) - [2020 - 2025]

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DisEnchantment

DisEnchantment

Golden Member
TSMC's N7 EUV is now in its second year of production and N5 is contributing to revenue for TSMC this quarter. N3 is scheduled for 2022 and I believe they have a good chance to reach that target.

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N7 performance is more or less understood.
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This year and next year TSMC is mainly increasing capacity to meet demands.

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For Samsung the nodes are basically the same from 7LPP to 4 LPE, they just add incremental scaling boosters while the bulk of the tech is the same.

Samsung is already shipping 7LPP and will ship 6LPP in H2. Hopefully they fix any issues if at all.
They have two more intermediate nodes in between before going to 3GAE, most likely 5LPE will ship next year but for 4LPE it will probably be back to back with 3GAA since 3GAA is a parallel development with 7LPP enhancements.

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Samsung's 3GAA will go for HVM in 2022 most likely, similar timeframe to TSMC's N3.
There are major differences in how the transistor will be fabricated due to the GAA but density for sure Samsung will be behind N3.
But there might be advantages for Samsung with regards to power and performance, so it may be better suited for some applications.
But for now we don't know how much of this is true and we can only rely on the marketing material.

This year there should be a lot more available wafers due to lack of demand from Smartphone vendors and increased capacity from TSMC and Samsung.
Lots of SoCs which dont need to be top end will be fabbed with N7 or 7LPP/6LPP instead of N5, so there will be lots of wafers around.

Most of the current 7nm designs are far from the advertized density from TSMC and Samsung. There is still potential for density increase compared to currently shipping products.
N5 is going to be the leading foundry node for the next couple of years.

For a lot of fabless companies out there, the processes and capacity available are quite good.

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FEEL FREE TO CREATE A NEW THREAD FOR 2025+ OUTLOOK, I WILL LINK IT HERE
 
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I hope Samsung succeeds this time, otherwise we won't see N2 class large consumer GPUs for a very long time, seems unlikely tho given their issue is yields which is total opposite to getting cheap large dies.

basix said:
But can you really get the volume you want?
Click to expand...

Yes and you can get a Rolls Royce from them, but only if you pay for it too - in full.
 
Win2012R2 said:
I hope Samsung succeeds this time, otherwise we won't see N2 class large consumer GPUs for a very long time, seems unlikely tho given their issue is yields which is total opposite to getting cheap large dies.



Yes and you can get a Rolls Royce from them, but only if you pay for it too - in full.
Click to expand...
Client dGPUs are not moving to any time soon they will be upgraded to N3P/C most likely
 
LightningZ71 said:
No leading edge foundry in a high demand era is going to take on ALL the risk of production with an exclusively "known good die" contract typically. That's why it was such a big deal when TSMC entered into one in the beginning of the "3nm" era. Samsung is still somewhat early in the production ramp of their "2nm" family. It's going to take time, especially for them.
Click to expand...

TSMC's "known good die" pricing was extended only to Apple and only for a single problematic node. Because 1) they were by far TSMC's biggest customer and 2) they had worked with Apple long enough to trust that they produced good designs, so TSMC weren't taking on too much risk of design related yield issues they'd be on the hook to pay for.
 
Crazy there are still rumors of bad SF2 yields when this is what, their 4rth iteration of GAAFET?

SF3 GAE OG (canned Exynos 2500? fabbed a crypto chip)
SF3 GAP (W1000)
SF3+ GAP (Exynos 2500, techinsights claims it's a better version of SF3 not on the official roadmap)
SF2 (SF3P renamed, used in Exynos 2600).

Even if we claim that SF3E doesn't count because it wasn't scaled, this would be their third iteration of the process then.
 
basix said:
Regarding all those yield issues I always wonder why customers do not opt for a different contract: Just pay only for yielded chips. Problem more or less solved for you. At least financially. If 60% yield also means unstable technical properties, then it might be a different story. But 60% yield should mean what it is: 60% of chips are functional. But not only functional: Parametric properties like frequency and power draw are also met. So the only pain point might be volume. If much gets scrapped, you get less chips. But as Samsung's chip manufacturing capacity is not saturated, that should not be an issue as well.
Click to expand...

basix said:
I understand, that a foundry is not solely responsible for bad yield. Also a bad design can lead to bad yields. Therefore a foundry might have reservations towards such a deal. But if Samsung wants to get contracts, you have to offer something valuable for the customer. If Qualcomm now assumingly goes back to a very high demand TSMC node, it speaks volumes.
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Certainly this, but also if you are the only game in town for something (like TSMC is), and you have established a business model that ensures your profit that customers have accepted, I can't see it changing 😉. Competition really is a good thing.
 
UBS noted that Intel's foundry business is seeing improving prospects, particularly in the 14nm process.

it expects customers such as Google, Apple, AMD, and NVIDIA to sign foundry commitments this fall.

In addition, the potential scenario of merging the Ohio wafer fab project with Musk's TeraFab also boosts confidence in the long-term outlook for the foundry business.

https://twitter.com/x/status/2043903730068979723
 
marees said:
UBS noted that Intel's foundry business is seeing improving prospects, particularly in the 14nm process.

it expects customers such as Google, Apple, AMD, and NVIDIA to sign foundry commitments this fall.

In addition, the potential scenario of merging the Ohio wafer fab project with Musk's TeraFab also boosts confidence in the long-term outlook for the foundry business.

https://twitter.com/x/status/2043903730068979723
Click to expand...
it's 14A not 14nm guess the 14nm Shock was too much
 
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marees said:
UBS noted that Intel's foundry business is seeing improving prospects, particularly in the 14nm process.

it expects customers such as Google, Apple, AMD, and NVIDIA to sign foundry commitments this fall.

In addition, the potential scenario of merging the Ohio wafer fab project with Musk's TeraFab also boosts confidence in the long-term outlook for the foundry business.

https://twitter.com/x/status/2043903730068979723
Click to expand...
We might have to wait for next week's Intel earnings call for updates on 14A process. Meanwhile, 18A yields should be very high by now. Beyond the Panther Lake, Crescent Island is expected to be the next product using the 18A process.
 
Momoka_ said:
We might have to wait for next week's Intel earnings call for updates on 14A process. Meanwhile, 18A yields should be very high by now. Beyond the Panther Lake, Crescent Island is expected to be the next product using the 18A process.
Click to expand...
Yield's are a strange metric to me. I am guessing from what I can find that PTL compute tile is about 114mm2 on 18A (everything else is on a less expensive, less risky node). Even if defects per cm2 were known, it still doesn't say at what frequency and thermal load it is measured at.

I think the real indicator ends up being the earnings call. It isn't just about making a great performing chip. It's about being able to make money with it.

Lots of times around here it seems like many people assume that there is no expense that isn't justified in the pursuit of performance. I wonder if that is no longer true for laptops and desktops. It appears to be true in DC though. If you can sell a processor for >10K each, I suspect you can spend a pretty penny on making it 😉.

AMD's Zen 6 compute tile I am guessing will be in line with Zen 5 at around 80mm2 N2P. I am guessing this is considerably less expensive overall than Intel's 18A and likely higher yield as TSMC seems to be much more risk adverse than Intel.

Aside from the profit standpoint, I am very interested in how BSPDN effects power and clock speeds. Of course, it's hard to separate that architectural limits from the lithography limits.
 
marees said:
UBS noted that Intel's foundry business is seeing improving prospects, particularly in the 14nm process.

it expects customers such as Google, Apple, AMD, and NVIDIA to sign foundry commitments this fall.

In addition, the potential scenario of merging the Ohio wafer fab project with Musk's TeraFab also boosts confidence in the long-term outlook for the foundry business.

https://twitter.com/x/status/2043903730068979723
Click to expand...
From the twit:
"UBS noted that Intel's foundry business is seeing improving prospects, particularly in the 14nm process."

I propose a toast:
To Intel 14nm - the cause of, and solution to, all of Intel's problems.
 
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