According to some preliminary data, the first Larrabee version will have from 16 to 24 cores, each with a 32KB L1 cache. The shared L2 cache will be about 4-6MB big. Individual IA cores will be connected via ring bus like the one used in Cell processors. The first Larrabee modifications will be manufactured with 45nm technological process, and the working frequencies of these processors are expected to be in the 1.7-2.5GHz interval. The expected TDP should be around 150W, however, please keep in mind that these are all very preliminary specifications.
http://www.xbitlabs.com/news/v...e_Graphics_Market.html
I can't tell for sure but it sounds like they intend to put larrabee in Havendale (nehalem with integrated graphics)...did anyone else get that from the article?