I doubt the SiS chipset is SMP compatible.... mostly because I don't know that SMP has ever targeted the market that SMP chips would be aimed for and I don't believe they have ever produced an SMP chipset before.
Zzzt, I believe what our referring to is the EV6 protocols Point to Point Bus connection for multiprocessor systems, meaning that each processor added to the system gets its own 200/266MHz or 1.6/2.1 GB/s of bandwidth to the chipset.
Whereas in conventional SMP chipsets each processor must share the same bus.
This is NOT specific to the AMD760MP chipset. It is inherent in the EV6 bus protocol that AMD uses for the Athlon, which was originally created by Alpha Processors Incorporated (API) and licensed to AMD for use with the Athlon.
As such, the KT266 chipset ould also support the point to point bus protocol supplying each processor wth a dedicated bus.
Of course the PC2100 DDR SDRAM used is still only able to supply 2.1GB/s of data to both processors which somewhat limits the effectiveness of a Point to Point bus, though it still has some defiite benefits.