I appreciate the info, truly, because I find this stuff interesting- but I feel you didn't really respond to what I was trying to say. If we are looking at IPC between 2 cores and want to know how much die space each CPU needed to achieve that IPC wouldn't it make the most sense to look at cores and maybe cache added to get that answer? Everything outside of that seems like it just muddies the waters
For example if there were a haswell version with hundreds of PCIe lanes it would be silly to add in the die space taken up by all the circuitry needed to control the lanes. Am I off-base here or does that make sense?
Edit: Also, I can't find the size of Baytrail atom cores anywhere- anyone know the size?
Let me try answering it again.
1) How much cache, memory controllers, and such is still an important issue with IPC. Sometimes you gain substantial increases (10%+) by adding more cache, sometimes adding more cache means barely any improvement. Thus I think things that do increase IPC should be taken in consideration comparing cpu designs.
(part 2 I am just picking random numbers, to illustrate a point)
2) I think knowing the cpu core size and the final die size does matter. Lets say you have a 70mm^2 cpu, 15 mm^2 is the cpu cores and the cache, thus 21% of the chip is cpu while 79% is everything else. If you can get 30% more ipc and keep the same frequency and roughly the same voltage by increasing the cpu size to 25mm^2 (an increase of 66% of the cpu cores and the cache) and everything else stays the same size we now have a 80mm^2 chip. The cpu core is now 31% of the chip, and overall the die size for the entire chip went up 14%. If we can sell the chip for at least 15% more money (assuming good yields) then this design decision probably made sense. Sometimes you can sell a chip for how ever much higher the ipc goes up, sometimes you can actually get more than 30% for this is the best silicon out there and thus people will pay top dollar. It really depends on the market.
Sometimes increase the cpu size barely changes the entire die size since the cpu is mostly everything else, this is a big thing in the cellphone market
3) We buy cpus as finished products. The market is not commondized enough that you can tell the manufacturer how many cpu or gpus lanes we want. Instead we just choose how much we want to spend, or whatever our priorities are and just pick the best cpu for our needs. (I am going to pick Apple for a moment, but any company can substitute here) Thus caring about things like apple A7 has a 100 mm^2 or 500 mm^2 die size really does not matter to consumers. It may matter to apple, but it is "not my circus, not my monkeys" the only way it affects us is how much profit apple makes at the end of the day whether they make more profit by shaving costs off the cpu or shaving costs of the screen cost does not really matter.
In sum I do not care about how efficient a cpu design overall is compared to another cpu design. I do not care in this type of intellectual exercise for I am more of a brass tacks type of guy. How is this going to affect me. Steve Jobs did not care how Rod Holt design the apple II power supply, he just wanted it to be quite, small, and cheap enough to make so he can put it in an enclosed area. For all Jobs cared little mice could be running on little treadmills just as long as it got the job done. Job recognized how hard his demands of Holt were but he did not need to know the details. (I may be telling the apple II story a little off, I am not that into it, but I am just trying to demonstrate a point).
I am amazed and full of wonder with what all the talented engineers have done with limited resources. I understand how hard it was to do what they did. I do not need to know "
how" they did it, I find the "
why and what" they did to be far more important.
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Just found
Intel's Die Size for the original bay trail they did not publically announced it but they gave all the info you need in the publically disclosed
datasheat pdf on page 351 c1 and c2. It is about
102 mm^2 since the dimensions are 9.723 by 10.477 which equals 101.87
Now I do not know what the individual core sizes are minus the cache. This will be important now that we will be start seeing custom baytrail with other designs such as powerVR graphics. If some one can get the accurate lithography of the cpu you can have someone like Hans calculate how much of the soc is dedicated to the cpu cores now that we got the die size down to the thousandth of the millimeter.
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