- Jun 18, 2001
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That's Intel's chipset. There are other chipsets from other vendors out there already or coming in the near future. For example, HP is currently shipping with their own zx1 chipset.It is obvious that Intel expects this to catch on slowly. Several places in that link had the phrase "deliver...Itanium 2-based systems...over the next year". Meaning don't expect to see it selling in any significant quantities right away. Plus with them advertizing a better chipset that won't be available till fall, expect zero sales until then.
The 1.5MB and 3MB cache versions both use the same die. Making a 1MB version wouldn't save any money because the die size is the same and would introduce some interesting issues due to the way the L3 is set up.Just for my curiosity, I'd like to see Intel release 1 MB cache versions for high-end workstations. That would probably push the cost to just under $1000 per processor. Many workstation programs don't benefit from that much cache.
That statement was from the viewpoint of a reluctant customer. Many business people have a viewpoint that an Intel chipset is best for Intel chips. With Intel devoting so much space in the press release about their great new upcoming chipset - that only keeps that idea strong. Thus my conclusion is that a significant number people considering Itanium 2 will wait to see the Intel chipset before making a purchase.That's Intel's chipset. There are other chipsets from other vendors out there already or coming in the near future.
That comment was just a hypothetical situation. I didn't know there would be L3 issues (its nice to have an Intel employee around that is willing to educate us on advanced info like this). But hypothetically Intel could reduce the die size for the lower cached versions if those issues could be resolved. Maybe it isn't possible the way Itanium 2 was designed, that is fine - I was just thinking out loud that it would have been nice to see lower priced low cache versions.The 1.5MB and 3MB cache versions both use the same die. Making a 1MB version wouldn't save any money because the die size is the same and would introduce some interesting issues due to the way the L3 is set up.
Companies like HP (and the other powerhouses) see chipsets as their way to "value-add" and differentiate themselves from other companies. Large "iron" companies have a substantial reputation of reliability and uptime for their chipsets. I would say that Intel is the "new kid on the block" in the server and workstation space. Which is not to trivialize the impact of the Intel chipset, but I don't think that people in the high-end computing space pay as much attention to the chipset vendor as they do the performance, features, price and reputation of the computing vendor.That statement was from the viewpoint of a reluctant customer. Many business people have a viewpoint that an Intel chipset is best for Intel chips. With Intel devoting so much space in the press release about their great new upcoming chipset - that only keeps that idea strong. Thus my conclusion is that a significant number people considering Itanium 2 will wait to see the Intel chipset before making a purchase.
The HP C3700 workstation (link to the HP page with the workstation overview) that I am typing this on right now has a 2.25MB L1 cache, and I've been using this workstation for well over a year now. Most of the applications that I run are in the 1-2GB range and take most of a day to run. From my perspective as an engineer, it seems to me that ~1-2MB caches are a drop in the bucket, but the more the better. As far reducing the cache from Itanium to Itanium 2, the reduction in the cache sizes has less to do with "wising up" as it does that the 2/4MB cache of the Itanium was off-die, and when the cache was moved on-chip in the Itanium 2 there was simply not enough space to put 4MB on-die.Intel wised up and reduced the cache from 2/4 MB down to a better 1.5/3 MB. I realize that servers might need the high cache - so Intel doesn't want to lower it too much. But really 1.5 MB is just rediculous for workstations at the moment. It is possible that Itanium 2 has an identity crisis - customers might wonder is it a server chip or a high-end workstation chip? If they don't know right away, they will not buy Itanium.
The Itanium 2 is a completely different microarchitecture from the first Itanium. The difference between the two is similar to the difference between the Pentium III and the Pentium 4 (or any other new implementation of the same instruction set architecture). The pipeline is shorter, it clocks faster (don't ask why.I have one question. What has Intel Changed for Itanium 2 besides the L3 Cache size? They increased the fsb bandwidth (according to the press release to 6.4GBs, and did I read the pr correctly, it is a point to point fsb like the EV6 is?), but otherwise, what makes Itanium 2, Itanium 2? The L3 Cache is still off die correct but it runs at the same clock speed as the CPU correct? I am only curious. I suppose I will find out in a few days when Chris over art Ace's Hardware posts part 3 of the Volume MP Systems which will cover the Itanium 2.
I have 4GB on this machine. I would only need more if I had more CPU's to run with since fundamentally my job is computationally constrained, not memory constrained. (ie. I could get more done faster if I had more computational power, but more memory wouldn't help much). I can't see that more than 4GB would help much on this machine - running more jobs in parallel (which would require the additional memory) would just slow everything down, and I pretty much never run more than a 1.5GB thread - although occasionally I'll kick off two. Still, that's only 3GB. Looking forward, I can see that more memory will be required. But for now 4GB is more than enough for what I do.Oh pm/dullard, I am just wondering, in Ace's hardware's recent Opteron and Itanium Editoral, they said that in their opinion Many workstation users believe that more than 4Gig of Memory isnt enough, I'm just wondering what your opinion isThanx
Originally posted by: Athlon4all
I have one question. What has Intel Changed for Itanium 2 besides the L3 Cache size? They increased the fsb bandwidth (according to the press release to 6.4GBs, and did I read the pr correctly, it is a point to point fsb like the EV6 is?), but otherwise, what makes Itanium 2, Itanium 2? The L3 Cache is still off die correct but it runs at the same clock speed as the CPU correct? I am only curious. I suppose I will find out in a few days when Chris over art Ace's Hardware posts part 3 of the Volume MP Systems which will cover the Itanium 2.
Oh pm/dullard, I am just wondering, in Ace's hardware's recent Opteron and Itanium Editoral, they said that in their opinion Many workstation users believe that more than 4Gig of Memory isnt enough, I'm just wondering what your opinion isThanx
Originally posted by: Jeff7
Itanium 2?? I didn't enven know that they had even really begun large sales of the original Itanium. Have I just been totally out of it or something?
First this is not true. Parts are shipping today. Intel is selling and shippping parts to OEMs. As far buying a system today, if you placed an order today you probably couldn't get one for quite a while because vendors are filling back orders. But Itanium 2 systems are shipping out the door today as well. So it's not a paper launch of CPU's or of systems. I worked on Itanium 2 for a long time and I'm still in contact with the team. They are shipping parts. I know this for a fact. It is not a paper launch.If you go over to Ace's you will see that it is the typical Intel paper launch. Doesn't expect shipments, especially in high volume until 4th 1/4.
Originally posted by: pm
grant2: As an Intel engineer, I'm always careful to avoid discussing future products. I know our roadmap out as far it exists today, but discussing future products outside the company is generally frowned upon (read: is grounds for being fired) so unfortunately I'm not able to discuss any aspects of it.
That's one way to translate it. But what am I supposed to say? It's the truth. And I like my job.Translation We have killer products coming down the pipe unfortunately I can't discuss them yet![]()
I'm on another project which has yet to be publicly revealed. I stopped working on McKinley about a month ago. I would have finished a lot sooner, but I worked on some of the back-end validation stuff (I was the technical lead for the team developing the manufacturing tests that check to make sure all of the transistors on all of the chips turn off and on correctly). And, completely honestly, I never had to fix any errata. The errata fairy never blessed me with a single problem in any of my units and I was responsible for the circuit design and mask layout of about half a million transistors during McKinley. A little bit of luck (plus I'm pretty conservative as a circuit designer. I mostly use static CMOS and don't take a lot of risks... Not very exciting, but at least I don't get phone calls in the middle of the night to come over to the lab to look at signal waveforms in my units).pm, are you still working on McKinley right now (fixing errata and such) or have you moved on to another project? (out of curiousity)
I'm not sure that I agree. This method adds another abstraction layer to the CPU. It adds flexability but at the cost of performance. The words "if it lives up to it's promise" are interesting because the truth is that the hype that preceeded Crusoe could never have been met. The fact is that translation can never be perfect and there is always a penalty. A well-thought out hardware implementation will always be faster. There are places where translation makes sense - but only if you are willing to knowingly sacrifice performance.Personally, I think Transmeta has the best way to achieve and maintain an elegant instruction set. If it lives up to its promise, you can enjoy all the benefits of constantly improving the instruction set without any of the pain of migrating code or emulating older sets.
