It is official. AMD announced and demonstrated Heavy Metal 32c/64t Threadripper 2. 7nm on the way.

piesquared

Golden Member
Oct 16, 2006
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link says it's compatible but some boards might struggle with the power requirements....

That isn't unexpected really, maybe some of the cheap boards, but then the article does say 'might'. I'm shocked that there is any compatibility at all.
 

Gikaseixas

Platinum Member
Jul 1, 2004
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Compatibility might be for stock settings. MB vendors might release skus with beefier circuitry and more robust cooling at even higher pricing.
 

Gideon

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Nov 27, 2007
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IMO, the most interesting part is seeing how well the off-die memory access works in practice. If it does well, it might lend some more credit to the rumors of EPYC 2 having a separate die for peripherals and memory access.

Im still not a huge fan of that, but we'll see
 
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ericlp

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Dec 24, 2000
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. I'm shocked that there is any compatibility at all.

If you take off the cover of a 1950X you'll see 4 CPUS under the hood. But only 2 are active. I'm not sure the reason behind this other than to give the heatspreader more stability than empty holes....but maybe... they filled in the holes with all the internal wiring so in the future they could replace them with active ones. Boom, double the fun and all backwards compatible! Cooling that 32 core beast at higher clock speeds. Probably a new cooler? Not sure. But, liquid will be required. Good thing there are already TR custom waterblocks made and ready to be used on the new chip. I'm sure the new chip will be priced at 1K bucks as well, maybe 1200 to start than back it down to a grand.
 
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JoeRambo

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Jun 13, 2013
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Strange feelings about these CPUs, Kudos for AMD for bringing 32 cores to workstation market for what is probably rather low price, but implementation?

1) 4 channels of DDR4 for 32 cores? Gonna be bw bound in quite a few FP heavy and rendering tasks, DDR4 3200 might help some, probably near 100GB/s, but still, that is tiny bw for such massive core counts.
2) AMD seems to bet a farm on OS NUMA support, hoping that tasks will first get scheduled on node that has memory controller and will stay there, otherwise memory latency is going to be horrible on a platform not known for tight latencies already. 64MB of L3 might buffer this, but very strange platform configuration for sure.
3) Sadly for AMD problem (2) is compounded by (1), since when mem controllers are loaded with requests, latencies go higher and higher, so things are not going to be fun at all. I guess there will be conflicts with bench tool makers like Aida64 etc, with AMD claiming that they offer pessimistic view of memory latencies
 

jpiniero

Lifer
Oct 1, 2010
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Pretty bizzare. I had thought that perhaps they might do a active 4 die product with one memory channel each but didn't think it would work. This way at least AMD could implement something like Game Mode so it would only behave like a 16 core Threadripper unless you actually need the extra cores. An unlocked Epyc with ECC disabled would be better.

My guess is that the 32 core will be $1500 and that there will be a 24 core model too.
 

LTC8K6

Lifer
Mar 10, 2004
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"We're still on an air cooler. We don't need any phase changers or liquid coolers to run this product. We can just go with our existing ecosystem and get full performance."

Shots fired
I'm sure the other guy doesn't need chilled water for full stock performance.
 
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LTC8K6

Lifer
Mar 10, 2004
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Let's find out when we see that product running at stock ... right?
We don't need to see it. Whatever it's full stock performance is on air, it's what it is. No one (yet) requires exotic cooling for stock performance in the work environment as far as I know.

Well, I suppose a few desktop chips have in reality needed more than air cooling due to high TDP.
 

EXCellR8

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Sep 1, 2010
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pleasantly surprised by this. HEDT is a bit beyond the scope of what I typically use my machines for but it looks like I'll be poking around for a TR4 mobo in the coming weeks. memory prices still in the stratosphere though, ugh.
 

Fir

Senior member
Jan 15, 2010
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If this is the same TR4 package with the other dies active it's definitely going to have latency issues. That's what's stopping me from using it. 1950X is already unusable for us as it is for this reason. And for power, a motherboard with dual 8 pin CPU power connectors is simply going to be a requirement. Don't be surprised to see higher end (eg. ASUS Rampage Extreme / EVGA Dark, et-al) boards doubling up on these connectors and using more phases as well. TR4 socket can deliver the power as it was built around EPYC, right? ;)

And the HEDT market is crossing over into workstation territory for sure. Except workstations have proper ECC support and much more memory capacity. This many cores needs to have 512GB at a minimum as someone else mentioned. VMs can certainly put these cores to use but again, we're stuck with using either workstation or server hardware due to the low ram amounts supported.

That pretty much rules out the enthusiast as he or she wants to push the system limits, aka overclocking.

What would be interesting is an enthusiast solution based on server hardware like EVGA's SR-2. 64 cores / 128 threads dual sockets supporting overclocking would be nice,eh? Those 1600 watt power supplies (outside of mining!) don't sound so far fetched or silly any more!

Yes it's gonna be a BEAST to cool no doubt. But the hardcore folks don't seem to be concerned about it. Just like muscle car freaks don't worry about gas mileage. ;)
 

Markfw

Moderator Emeritus, Elite Member
May 16, 2002
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I didn't understand AMD's post since the other co's demo was not a stock performance demo.
I can understand. AMD is saying "you don't need chilled water to run our new CPU". I am guessing clocks might even dip below 3 ghz like EPYC. You can't take 2 180 watt TR's and have it all running at 3.4 ghz and me 250 watt. But I do think we can get overclocked 3.7 or 3.8 on a good AIO.

But I will have one, and with a new motherboard as soon as I can get my hands on it. I only have 4 threadrippers now.
 
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coercitiv

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Jan 24, 2014
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I didn't understand AMD's post since the other co's demo was not a stock performance demo.
Did you understand Intel's message when they said AMD CPUs are glued togheter? It was marketing speak then, it's marketing speak now.

More importantly though, reportedly Intel's presentation was fashioned in such a way that some members of the press actually thought they were seeing stock performance. Intel only said "product preview" and "28 cores @ 5Ghz", they never mentioned anything about overclocking or cooling method. They also emphasized the benefit of having both ST and MT workloads at 5Ghz, further inducing the idea that this product would behave similarly when launched.
 

LightningZ71

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Mar 10, 2017
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One of the things that impacts the performance of TR and EPYC is the speed of the links between the dies on the MCM. With the demonstration using ddr4-3200 ram, do you think that those links are running at a higher frequency as well? We already know that the IF speed in the dies themselves is tied to the DRAM frequency. With that speed increased, could AMD run the inter-core links at higher speeds to take out a chunk of latency for far core memory access?

It seems to me that the real sweet spot for general use might be the 24 core part. More thermal and power headroom per core, most cache per core, least demand on the IF links for the far cores, while still pushing a lot of cores at the same time.
 
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