You think that a motherboard can t have 2 FM2+ sockets because there is no hypertransport and the limited numbers of PCI-E lines ?!
20 PCI-E Lines version 3.0 are not enough to interconnect the 2 APU-s ?!
Then how come that you can pair an APU with discrete video card ?!
Can you detail a little more the impossibility of such motherboard.What is exactly that can t be done.
I presume the APU-s would connect simultaneosly to the chipset.
The PCI-E is version 3.0.
So what is the exact limiting factor ?!
You think that a motherboard can t have 2 FM2+ sockets because there is no hypertransport and the limited numbers of PCI-E lines ?!
20 PCI-E Lines version 3.0 are not enough to interconnect the 2 APU-s ?!
Then how come that you can pair an APU with discrete video card ?!
Can you detail a little more the impossibility of such motherboard.What is exactly that can t be done.
I presume the APU-s would connect simultaneosly to the chipset.
The PCI-E is version 3.0.
So what is the exact limiting factor ?!
You're way outside your area of expertise here, friend.
CPUs need to be far more interconnected than PCIe would allow for. The best you could hope for using PCIe as an interconnect would be some sort of blade system where you've got nodes to share a workload.
Using PCIe you've got issues with both bandwidth and latency.
HT isn't worlds away from dual-channel DDR3, though. Doesn't HSA do this exact thing?
HSA is not supported on discrete GPUs for the same reason.
So you know for sure that no pins are reserved for such purpose?!
Didn t AMD stated that such APU-s will be used in servers ?
So you know for sure that no pins are reserved for such purpose?!
Didn t AMD stated that such APU-s will be used in servers ?
AMD might be working on a 16 core SR CPU acording to this link, but I doubt it being FM2+. Link
Correct. Warsaw is PD based.According to the article,it says the picture is from the Kaveri programming guide. I thought Warsaw was PD based??