Is there any news about a dual socket FM2+ board ?!

Deceneu

Junior Member
Jan 14, 2014
23
0
0
#1
Is there any news about a dual socket FM2+ board ?! I think it would be a great opportunity to make crossfire on APU-s and have 8 cores at work.
 
Apr 22, 2012
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#2
No such thing and not possible. There is no Hypertransport.
 

ViRGE

Elite Member, Moderator Emeritus
Oct 9, 1999
31,518
2
106
#3
Correct me if I'm wrong, but don't you need additional HT links for that? FM2+ would only have the pins for single-CPU operation, I would think.
 
Apr 22, 2012
20,395
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#4
FM2+ only got 20 PCIe lanes as "outside communication". 4 for the chipset and 16 for graphics.
 

Deceneu

Junior Member
Jan 14, 2014
23
0
0
#5
You think that a motherboard can t have 2 FM2+ sockets because there is no hypertransport and the limited numbers of PCI-E lines ?!
20 PCI-E Lines version 3.0 are not enough to interconnect the 2 APU-s ?!
Then how come that you can pair an APU with discrete video card ?!

Can you detail a little more the impossibility of such motherboard.What is exactly that can t be done.
I presume the APU-s would connect simultaneosly to the chipset.
The PCI-E is version 3.0.
So what is the exact limiting factor ?!
 
Apr 22, 2012
20,395
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#6
PCIe is not suited for it at all.
 
Oct 9, 1999
11,474
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#7
You think that a motherboard can t have 2 FM2+ sockets because there is no hypertransport and the limited numbers of PCI-E lines ?!
20 PCI-E Lines version 3.0 are not enough to interconnect the 2 APU-s ?!
Then how come that you can pair an APU with discrete video card ?!

Can you detail a little more the impossibility of such motherboard.What is exactly that can t be done.
I presume the APU-s would connect simultaneosly to the chipset.
The PCI-E is version 3.0.
So what is the exact limiting factor ?!
You're way outside your area of expertise here, friend.

CPUs need to be far more interconnected than PCIe would allow for. The best you could hope for using PCIe as an interconnect would be some sort of blade system where you've got nodes to share a workload.

Using PCIe you've got issues with both bandwidth and latency.
 

Blue_Max

Diamond Member
Jul 7, 2011
4,220
0
106
#8
If it could be done easily you'd see it more often.

Dual/quad sockets only exist in the Xeon / Opteron world for good reason. Too bad...
 

fellix

Junior Member
Jan 30, 2012
4
0
66
#9
Multi-socket systems need cache-coherent protocol interfacing to work together under SMP aware OS. HyperTransport does support such mode and none of the APUs from AMD uses this interface, but only PCI-E for peripheral interconnection.
 
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NTMBK

Diamond Member
Nov 14, 2011
8,283
248
126
#10
You think that a motherboard can t have 2 FM2+ sockets because there is no hypertransport and the limited numbers of PCI-E lines ?!
20 PCI-E Lines version 3.0 are not enough to interconnect the 2 APU-s ?!
Then how come that you can pair an APU with discrete video card ?!

Can you detail a little more the impossibility of such motherboard.What is exactly that can t be done.
I presume the APU-s would connect simultaneosly to the chipset.
The PCI-E is version 3.0.
So what is the exact limiting factor ?!
You want to maintain CPU cache coherency over PCIe? Um yeah, good luck with that...

There's a reason why dual-socket servers use special QPI/Hypertransport connections, instead of just getting a pair of 4770Ks and gluing them together with PCIe.
 

DominionSeraph

Diamond Member
Jul 22, 2009
8,388
21
91
#11
You're way outside your area of expertise here, friend.

CPUs need to be far more interconnected than PCIe would allow for. The best you could hope for using PCIe as an interconnect would be some sort of blade system where you've got nodes to share a workload.

Using PCIe you've got issues with both bandwidth and latency.
HT isn't worlds away from dual-channel DDR3, though. Doesn't HSA do this exact thing?
 

Deceneu

Junior Member
Jan 14, 2014
23
0
0
#14
So you know for sure that no pins are reserved for such purpose?!
Didn t AMD stated that such APU-s will be used in servers ?
 

NTMBK

Diamond Member
Nov 14, 2011
8,283
248
126
#15
So you know for sure that no pins are reserved for such purpose?!
Didn t AMD stated that such APU-s will be used in servers ?
They will be used in single socket servers.
 
Oct 9, 1999
11,474
0
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#16
So you know for sure that no pins are reserved for such purpose?!
Didn t AMD stated that such APU-s will be used in servers ?
Who can really say for sure? Even if I can produce a schematic that says there is no such pin, that doesn't mean there isn't a pin mislabeled. Intel did the trick with the early S370 Celerons.

I believe when AMD said that though, they meant same die in a new package which is how they've been doing things for a few generations now.
 

parvadomus

Senior member
Dec 11, 2012
685
0
76
#17
AMD might be working on a 16 core SR CPU acording to this link, but I doubt it being FM2+. Link
 

USER8000

Golden Member
Jun 23, 2012
1,489
2
136
#19
AMD might be working on a 16 core SR CPU acording to this link, but I doubt it being FM2+. Link
According to the article,it says the picture is from the Kaveri programming guide. I thought Warsaw was PD based??
 

ViRGE

Elite Member, Moderator Emeritus
Oct 9, 1999
31,518
2
106
#20
According to the article,it says the picture is from the Kaveri programming guide. I thought Warsaw was PD based??
Correct. Warsaw is PD based.

AMD isn't building a large SR chip, but the uarch has the capability for it should AMD have decided to go ahead and build it.
 


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