Is there any multi-sockets i7(3770K) machine available?

[hshen1]

Hi,

I am going to buy a machine. I have done a little investigation on Dell and HP's website. I have found, for the Intel CPU, only Xeon exists in a multi-socket (more than one socket) machine. i7,i5 and etc.. only exists in single socket machine. Is this design constrained? Is there any multi-sockets i7(e.g., 3770K) machine available to purchase?^_^

 

[Bill Brasky]

There are no multisocket options for the k processors and yes, that is by design. If your workloads require multisocket power, then xeon/ opteron products are in your future!

 

[hshen1]

There are no multisocket options for the k processors and yes, that is by design. If your workloads require multisocket power, then xeon/ opteron products are in your future!

I see. What about other series in i7,i5 and i3 ?:whiste:

 

[dave_the_nerd]

I see. What about other series in i7,i5 and i3 ?:whiste:

Nope.

 

[The Phoenix]

nope dont believe so

 

[Sleepingforest]

Why would you even want a multi-socket Core socket? For the overclocking and MOAR COAR power?

 

[Ayah]

Design constrained, yes. They don't have extra QT links for socket-socket coms.

 

[WhoBeDaPlaya]

Why would you even want a multi-socket Core socket? For the overclocking and MOAR COAR power?

Young whippersnappers don't remember the venerable ABIT BP6. I miss mine

 

[hshen1]

Why would you even want a multi-socket Core socket? For the overclocking and MOAR COAR power?

It's kind of hard to explain. I need to do some research related to the memory contention on multi-socket system. And at the same time, I need the processor to have good frequency scaling capability. I have found the i7 K series generally has better frequency scaling capability than Xeon

 

[hshen1]

Design constrained, yes. They don't have extra QT links for socket-socket coms.

I see. Thanks

 

[Sleepingforest]

Young whippersnappers don't remember the venerable ABIT BP6. I miss mine

Tell me more grandpa WhoBeDaPlaya!

No, for real though, tell me all about it.

 

[Ayah]

It's kind of hard to explain. I need to do some research related to the memory contention on multi-socket system. And at the same time, I need the processor to have good frequency scaling capability. I have found the i7 K series generally has better frequency scaling capability than Xeon

What about Xeons in the eVGA SR-X?

 

[hshen1]

What about Xeons in the eVGA SR-X?

I believe the frequency scaling capability is not determined by the boards,right?

 

[Railgun]

Tell me more grandpa WhoBeDaPlaya!

No, for real though, tell me all about it.

For another thread but the early celeries of that generation had SMP enabled. The board was the 440BX chipset and the OCing you could to was fantastic.

Intel figured it out not long after and subsequently disabled SMP.

I also miss mine.

 

[ShintaiDK]

For another thread but the early celeries of that generation had SMP enabled. The board was the 440BX chipset and the OCing you could to was fantastic.

Intel figured it out not long after and subsequently disabled SMP.

I also miss mine.

If I recall right you had to do a slight hardware modifcation on the CPUs to work that way.

It was also the times before Windows 2000. So actual gaming was a huge problem if you wanted 2 CPUs supported by the OS.

 

[Railgun]

For the coppermines you needed an adapter, but the mendocinos were drop in. I don't recall modding anything at the time, and ran dual 400s.

 

[A5]

If I recall right you had to do a slight hardware modifcation on the CPUs to work that way.

It was also the times before Windows 2000. So actual gaming was a huge problem if you wanted 2 CPUs supported by the OS.

If you look at the AT testing that went up the other day, multiple sockets are still a problem in some games. Kinda silly.

 

[A5]

It's kind of hard to explain. I need to do some research related to the memory contention on multi-socket system. And at the same time, I need the processor to have good frequency scaling capability. I have found the i7 K series generally has better frequency scaling capability than Xeon

If you're looking into that kind of thing, you should be able to extrapolate the relationship you need by lowering the multipliers and then scaling back up to stock, unless you are trying to test a theory that the relationship will somehow be different outside of the standard clocking regime.

If you overclock, your data will be suspect at best because you will not be able to tell if your errors are from an unstable overclock or the phenomenon you are trying to explore.

 

[jaqie]

erm...memory contention on what type of multisocket system? NUMA? SMP? H-bridge architecture... I think you do not know what you are getting into.

 

[Insert_Nickname]

It was also the times before Windows 2000. So actual gaming was a huge problem if you wanted 2 CPUs supported by the OS.

Oh, yes I remember that. Win 9x never had official support for SMP. Win2K was a great step forward in that regard. But then SMP on the desktop wasn't all that common back then.

 

[hshen1]

erm...memory contention on what type of multisocket system? NUMA? SMP? H-bridge architecture... I think you do not know what you are getting into.

Yes.I am not very familiar with the memory arch you mentioned. What I am going to consider actually is the last level cache contention. If the tasks running on a cpu(on one socket)' total working set is bigger than the last level cache, the cpu needs to repetitively access the memory which will greatly slow down the speed. In this case, it is better to map some of the tasks onto another socket for the performance purpose,right?

Originally I was considering the cache hierarchy. For example, mapping different tasks to different cores on the cpu may mitigate the cache contention. However, recently I have found almost all the Intel cpu now shares the same last level cache, which means mapping different tasks to different cores on the same socket probably will not mitigate the cache contention (I am assuming the l1 , l2 and l3 cache's speeds are not that different while the memory access is the bottleneck):ninja:

 

[hshen1]

If you're looking into that kind of thing, you should be able to extrapolate the relationship you need by lowering the multipliers and then scaling back up to stock, unless you are trying to test a theory that the relationship will somehow be different outside of the standard clocking regime.

If you overclock, your data will be suspect at best because you will not be able to tell if your errors are from an unstable overclock or the phenomenon you are trying to explore.

Yes. Definitely I am going to underclock. Somebody on the forum told me probably on Ivy bridge, I can at least underclock to 1600MHz. I hope this is true. In addition, I may want the frequency scaling range as big as possible. So I also consider overclocking. I think as long as it works stably, there should be no substantial difference between underclocking and overclocking....

 

[Insert_Nickname]

Yes. Definitely I am going to underclock. Somebody on the forum told me probably on Ivy bridge, I can at least underclock to 1600MHz. I hope this is true. In addition, I may want the frequency scaling range as big as possible. So I also consider overclocking. I think as long as it works stably, there should be no substantial difference between underclocking and overclocking....

I have a Sandy Bridge core working at 0.836v@1900MHz, so you can properly go lower then that if you only use the 16x multiplier...

It won't POST under 0.728v though, that's properly the lower limit.