Is it possible for a Northbridge to mimic memory banks when using integrated memory controllers??

[MadRat]

Is it possible for a Northbridge to mimic memory banks when using integrated memory controllers? Seems that AMD's memory controllers have some real limits to them based on fixed factory settings. Would it be possible for chipset makers to emulate memory banks using a Northbridge connection an AMD64 processor? It would be interesting to see 4x DDR500 support for dual channel AMD64 memory controllers, where each channel recieves feedback from dual-channel DDR500. Not that the CPU could use the memory bandwidth, but it would effectively double the memory banks available to each CPU.

 

[Peter]

What are you talking about?

 

[CTho9305]

He wants more flexibility than the AMD64's onboard memory controller offers. Maybe he wants to build a rambus athlon64, and then set up an external chipset so that the hammer still thinks it's talking to it's preferred memory type.

My thoughts: 1. expensive 2. high latency (ignoring my rambus example, you're adding more delay - now you have ram delay + time in the chipset)

 

[Peter]

Well of course you can make a chipset that has a memory controller, and map it into the system's address space. No problem there - after all that's what happens if you have multiple processors.

You'll hardly get anywhere near the low latency and excellent throughput of the A64's own memory controller. What's the complaint anyway? The integrated memory controller makes perfect sense, and what might be seen as restrictions is actually just being realistic of what can _safely_ be done on DDR333 and DDR400.