Is 512bit memory gonna come out soon?

[Bull Dog]

Originally posted by: zephyrprime
(and Acanthus is right, the current 256bit memory busses are actually 4x64bit channels)

9700Pro, 9800Pro, 9800XT, All X8 series cards, FX59 series, GF68 series, GF 78 series, GF 79 series use a memory controller that has 4x64bit channels. The X18/9 series use a 8x32bit memory controller.

a 512bit memory controller would be incredibly complex if it had to use 32bit memory chips. That would be 16 memory chips all with wires going to the GPU......scaring myself thinking about it.

 

[SonicIce]

Originally posted by: So
Why do you think that the consoles dropped the 'bit' wars after the N64?

because N64 pwnd everything

 

[SpeedZealot369]

Originally posted by: SonicIce

Originally posted by: So
Why do you think that the consoles dropped the 'bit' wars after the N64?

because N64 pwnd everything

Can't say the same for gamecube though.

 

[jiffylube1024]

Originally posted by: zephyrprime
I'm not so sure about the idea that we have adequate bandwidth right now. Just look at the amount of proportional bandwidth between the 9700pro and the x1900.

9700pro: 8 pipes, 325MHz, 620mhz ram data rate, 256bit memory width
x1900: 16 pipes, 625MHz, 1450MHz ram data rate, 256bit memory width

Do the math and you'll see that the 9700pro had 64% more bandwidth per clock tick*per pipe. Now the x1900 probably has more efficient memory usage techniques up its sleeve but isn't this outweighed by the following factors:
1. Pipelines are more efficient.
2. proportional latency of ram is getting worse, not better
3. greater usage of pixel shaders increase memory pressure

The geforce 7900 is in even worse shape for memory bandwidth because it has 24 pipes. In fact, I would guess that the reason the 7900 doesn't blow away the 1900 even in games that don't have really heavy pixel shader usage is because the 7900 is more bandwidth constrained than the 1900.

The problem with increasing the memory bus width is that the PCB would probably be too expensive to make. The current PCB in graphic cards is already 12 layers thick. That's why I think companies need to get creative and create some sort of multichip module like IBM uses for some of their stuff. Yeah, the pcb for for the MCM would be expensive per square inch but since it's much smaller than the current board PCB, I think the whole thing would be cheaper overall.

(and Acanthus is right, the current 256bit memory busses are actually 4x64bit channels)

But keep in mind that memory bandwidth is only a factor in bandwidth limited situations: very high resolutions with lots of AA. Below 16X12 resolution and with lower than 6X AA, memory bandwidth is less of a factor.

But you're exactly right - it would be too damn expensive and a total pain in the arse to put on the extra traces for 512-bit memory right now. Look at the back of a 256-bit card already and you can see how busy it gets with 256-bit memory.

Although ATI does use a 512-bit ring bus, it's not the same as a fully 512-bit memory bus.

 

[zephyrprime]

Originally posted by: jiffylube1024
But keep in mind that memory bandwidth is only a factor in bandwidth limited situations: very high resolutions with lots of AA. Below 16X12 resolution and with lower than 6X AA, memory bandwidth is less of a factor.

Yeah, this is a good point. I totally forgot about this but monitor resolutions are not increasing very fast at all. The biggest element of bandwidth usage is probably texturing and the load of that is probably proportional to screen resolution. This is probably the biggest reason why we can get away with less relative bandwidth in the new cards.

Also, I thought of a clever way to decrease pincount on video card rams: make the ram asymmetrical. Video cards primarily read data, not write it so you could specialize the drams on a video card for reading rather than writing. The chips could be 64bits read/16bits write or something like that. There would still need to be at least one chip that was symmetrical that would store all the non-texture data.

(nvidia, give me a call baby and we'll do lunch.)

 

[Matthias99]

Originally posted by: zephyrprime
Also, I thought of a clever way to decrease pincount on video card rams: make the ram asymmetrical. Video cards primarily read data, not write it so you could specialize the drams on a video card for reading rather than writing. The chips could be 64bits read/16bits write or something like that. There would still need to be at least one chip that was symmetrical that would store all the non-texture data.

(nvidia, give me a call baby and we'll do lunch.)

This would be difficult to do in practice. Normally you have one set of address lines, and you set the interface to either 'read' or 'write'. In a 256-bit memory interface, it's not like there are 128 dedicated 'read' pins and 128 dedicated 'write' pins; you use all the pins for reads and writes, and you can only do one or the other at once (well, it's actually multiple smaller interfaces that *can* independently read and write, but the granularity is limited to what the memory chips actually support).

Going to a model where you can read and write simultaneously with finer granularity than the memory chips really offer would require a 'smart' memory controller capable of buffering read and write operations at full speed. It's not impossible, but I can't see this being worth the extra cost.

 

[aka1nas]

Also, higher focus on using shaders to improve graphics has kept bandwith requirements from increasing as quickly.

 

[Munky]

We are not memory bandwidth limited in modern gpu's, there's no reason to switch over to a 512 bit bus. For example, a 128 bit 6600gt outran a 256 bit 9800p, because it had a faster gpu. While at 1600x1200 with AA and AF the 9800p would have probably tied or beat a 6600gt, getting 10 fps instead of 8 is hardly worth celebrating. Instead, we need more efficient memory controllers. For example, comparing the x1800xt to the gtx512, the x1800xt was always behind without AA, but as soon as you added AA, it caught up and sometimes beat the gtx, even though the gtx had higher clocked memory. With the transition to ddr4, there would be even more memory bandwidth available, so a 512 bit bus will likely not be used for at least another few years.

 

[MBrown]

Originally posted by: Justin343563611

Originally posted by: Ike0069
nVidia came out with a 7800 GTX 512 a while ago.

You're smart.

LMAO!

 

[zephyrprime]

Originally posted by: Matthias99 Normally you have one set of address lines, and you set the interface to either 'read' or 'write'. In a 256-bit memory interface, it's not like there are 128 dedicated 'read' pins and 128 dedicated 'write' pins; you use all the pins for reads and writes, and you can only do one or the other at once (well, it's actually multiple smaller interfaces that *can* independently read and write, but the granularity is limited to what the memory chips actually support).

Nuts, you're right. Well there goes that idea.