Intels plans to 2008+ 20 cores in 2 years

[Lonyo]

Link

If someone can translate this:

Yet we could not get an answer on the question whether the Kentsfield's multi chip package will carry four Millville cores or two Allendale type chips. Both is doable why we expect it to be composed of two dual cores.

It would be nice.

 

[coldpower27]

Kentsfield is supposed to be a Quad Core product.

What Tom's is interested to know is will it be 2x Allendale? or 4x Millville

Allendale is basically Conroe but with only 2MB of Shared Cache vs 4MB on Conroe.
Millville is a Single Core with 1MB Cache, basically 1/2 of an Allendale.

So like Presler will it be 2 Dies on 1 Package with Allendale or 4 Dies on 1 Package with Millville?

Note this is all on the 65nm process.

 

[phaxmohdem]

I for one can't wait for Intel to shut the hell up and crap out some freakin silicon already for us to put through the paces to see what it's truely made of. Would be awesome if these new chips can compete/beat current A64 offerings, ESPECIALLY from a price/performance standpoint. This would be good for everyone.

 

[Zebo]

IBM.. er,,,I mean AMD better get crackin' on 65nm quick. Intel will be able to sell processors at half the price as AMD soon if they stick w/ 90nm. As usual another worthless article by THG though - what speeds are we talking here? When exactly? Pricing?

 

[Duvie]

Quite laughable in my opinion....Intel has done poorly of late and I am not that excited about 2006 lineup so I find 20 core 2008 lineup not likely.....


Many suggest you need 65nm to 40nm to make it worthwhile for quad cores and yet 20 will need much much less......I dont see us hitting 40nm until 2007....

 

[AkumaX]

Hmm.. i think Kentsville might have something, if Clarksmith and Lanashott can mix something up on the Smallville chipset, as long as Loismill stays out of the mix.. or Luthoroe might screw things up with Krypodale or Grantsonite.

 

[imported_michaelpatrick33]

Originally posted by: AkumaX
Hmm.. i think Kentsville might have something, if Clarksmith and Lanashott can mix something up on the Smallville chipset, as long as Loismill stays out of the mix.. or Luthoroe might screw things up with Krypodale or Grantsonite.

I was just thinking the same thing :laugh:

 

[BrownTown]

Quite laughable in my opinion....Intel has done poorly of late and I am not that excited about 2006 lineup so I find 20 core 2008 lineup not likely.....


Many suggest you need 65nm to 40nm to make it worthwhile for quad cores and yet 20 will need much much less......I dont see us hitting 40nm until 2007....

Did you even read the article, its talking about 20 different projects, not a 20 core chip..., And it clearly says they aren't gonna go to 45nm before 2007...

 

[dmens]

LOL, way to trash something before reading it.

Almost all the 65nm codenames revolve around the merom core.

 

[BrownTown]

My concern with this roadmap is that I see little talk of an interconnect between the processors, or an integrated memmory controller like the X2 has. Theres just no way that a FSB working like it does now can handel the communication between 4 cores, and to the RAM. Even with 2 cores its getting bogged down in the Pentium D. Talk of just slapping 2 dual core processors together to make a 4 core processor, or maybe even using 4 single core processors sounds bad to me unless there is another die on board to facilitate communication between them.

 

[Zebo]

All that really matters is how high they will clock, be relased as, and price.. we already know basically it's performance even w/o direct connect (crossbar whatever) and w/o mem controller.. pretty good.. and there are disadvatages economically AMD's way of doing things.

 

[BrownTown]

Actually thats not really true, you have to remember Amdahls law. Adding 2, 4, or even 100 processors can only speed up a computer so much if everything else stays the same. Right now Intel has a 800MHz bus, and they are currently looking towards 1066 or 1333 for the Conroe. But running 4 cores off of a 1333mhz bus means each one only gets 333Mhz dedicated to it. An even of you are using DDR1066 that means each core only gets DDR266 equivilent bandwidth. Obviously this means that the cores are being slowed down by inadequate communication bandwidth.

 

[Acanthus]

Originally posted by: BrownTown
Actually thats not really true, you have to remember Amdahls law. Adding 2, 4, or even 100 processors can only speed up a computer so much if everything else stays the same. Right now Intel has a 800MHz bus, and they are currently looking towards 1066 or 1333 for the Conroe. But running 4 cores off of a 1333mhz bus means each one only gets 333Mhz dedicated to it. An even of you are using DDR1066 that means each core only gets DDR266 equivilent bandwidth. Obviously this means that the cores are being slowed down by inadequate communication bandwidth.

Unless you add more channels, increase the clockspeed, or move to more advanced memory architecture (XDR)

 

[BrownTown]

Unfortunately Intel hasn't revealed any plans to do any of those in the near future for Desktops. Obviously DDR3 will help with the memmory bandwidth depending on how fast they get it moving (although DDR1066 is already assuming some good speed advances). I'd also like to see dual independant busses, but thats means a whole lot of traces on the motherboard. And you still have the problem that core-core traffic has to go across the FSB instead of staying on package.

 

[gotsmack]

WOW, it looks really exciting in 2 years. Will windows vista be able to handle 4 cores? Looks like I'm going to ride out my s939 platform for 2 more years until I upgrade.

 

[Viditor]

Originally posted by: BrownTown
Actually thats not really true, you have to remember Amdahls law. Adding 2, 4, or even 100 processors can only speed up a computer so much if everything else stays the same. Right now Intel has a 800MHz bus, and they are currently looking towards 1066 or 1333 for the Conroe. But running 4 cores off of a 1333mhz bus means each one only gets 333Mhz dedicated to it. An even of you are using DDR1066 that means each core only gets DDR266 equivilent bandwidth. Obviously this means that the cores are being slowed down by inadequate communication bandwidth.

Exactly...this is the problem with the FSB model, and why Intel was going to move to the CSI model. This may time out though, since CSI has supposedly been delayed to 2008...
Unfortunately for Intel, the Opteron is already there with a distributed data design (HT), and they are going to be releasing the quad core in 2007.