intel's E7500 Plumas hit bandwidth bottleneck

Adul

Elite Member
Oct 9, 1999
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danny.tangtam.com
http://www.theinquirer.net/?article=4758

THE MUCH VAUNTED E7500 Plumas chipset is failing to meet its bandwidth promises, according to people building machines using the product.

Plumas 7500 claims a 3.2GB/s IO bandwidth but integrators tell the INQUIRER that getting even 10 per cent of this throughput is proving well nigh impossible.

:confused:
 

MadRat

Lifer
Oct 14, 1999
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That's progress for you.

320MB/s isn't too shabby for a PCI bus.
 

BD231

Lifer
Feb 26, 2001
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Originally posted by: MadRat
That's progress for you.

320MB/s isn't too shabby for a PCI bus.

Still pretty damn odd, what kind of tweaking would give you a 90% bandwidth increase?
 

MadRat

Lifer
Oct 14, 1999
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Maybe its some sort of non-standard 48-bit or 64-bit addressing support across the PCI bus? The OSs may not support the particular structure of communication needed for this type of data transfer, especially considering an OS like Windows 2000 was written with a much more limited PCI bus in mind. It may also be some sort of scheduling issue that is hamstrung by the OS, too.
 

FishTankX

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Oct 6, 2001
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My question is with 3.2GB/s of I/O bandwidth, what sort of insane interconnect would you need between the southbridge/northbridge? I thought the hub architecture maxed out at 266! Even MUTIOL maxes out at 1GB/s. What I think Intel needs to do is make a .13 micron chipset that integrates north and southbridges on the same chipset and uses a massive interconnect between north and south bridge. Rmemeber, to sustain 3.2GB/s of IO bandwidth, you need a pretty dam good interconnect between the bridges. Providing 3.2GB/s of memory bandwidth is crazy! It's impossible to completly saturate the memory bus anyways, and trying to saturate it with 100% I/O is even more impossible.
 

ElFenix

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Mar 20, 2000
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thats not good. in fact, thats downright awful when put in context. 320 is a nice number though.
 

MadRat

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Oct 14, 1999
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Letters to the editor suggest the motherboard being reviewed was using standard PCI slots and not 64-bit/66MHz PCI or PCI-X slots, explaining the poor thoroughput. But one letter supported the article saying it was crippling hard drive access times. So it could be a register problem in its firmware or driver support.