Intel's 0.09-micron Process - More Details Emerge

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BD231

BD231

Lifer
Feb 26, 2001
10,568
138
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The results of these improvements are of course, higher clock speeds and lower operating voltages. The first 90nm transistors will operate at a 1.20V and eventually scale down to even lower voltages

Bring on the Prescott :D
 
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Aquaman

Lifer
Dec 17, 1999
25,054
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What is the next magnitude after the micron? Seems like we will hit that in 2-3 years ;)

Cheers,
Aquaman
 
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Czar

Lifer
Oct 9, 1999
28,510
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For starters, Intel will be sampling 90nm based parts by the end of this year. But as a change of pace, instead of the mobile arena being the first to enjoy a new manufacturing process, it will be the desktop and server sectors that get a taste of Intel's 90nm technology first.
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fear the hammer ;)
 
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ALstonLoong

Golden Member
Oct 24, 2000
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emm..wonder why intel dont wanna use SOI in prescott ...instead of waitting for 3 more years 2005 .
AMD Hammer's on-die memory controller seems interesting ....
 
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McCarthy

Platinum Member
Oct 9, 1999
2,567
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Now you're talkin :)

Wonder how long at 1.5v AA would power a current P4? Weird thought for the morning.

 
Dulanic

Dulanic

Diamond Member
Oct 27, 2000
9,969
592
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It couldnt... a AA batery cant put out NEAR enough to power one... top CPUs draw 50-100 Amps (Just a rough # not exact)... no way a battery could ever put out that much power. Even tho we keep going down in Volts, our amps drawn keep going up and our overall wattage is going up too... not down. So while the voltage is going down... total power drawn (watts) is going up.
 
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SexyK

Golden Member
Jul 30, 2001
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Originally posted by: Wingznut PEZ
:D
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So when is your sig going to switch over to ".09µ Lithography Technician, Intel Corp." :D
Hopefully sooner rather than later!

Kramer
 
ElFenix

ElFenix

Elite Member
Super Moderator
Mar 20, 2000
102,402
8,574
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Originally posted by: SexyK
Originally posted by: ElFenix
when is this coming?
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Mid 2003 according to Anand's article.

Kramer
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hmmm... i guess i would have found that out had i learned how to read :p

by mid 2k3 amd and everyone else might have figured out the voltage leaks at .13. maybe.
 
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Wingznut

Elite Member
Dec 28, 1999
16,968
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Originally posted by: Sunner
Like you didn't know all of this already ;)
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I know... But I REALLY like it when Intel announces this stuff. Then I can actually talk about it and maybe even give better answers than "Sorry, I can't talk about future products." ;)

Originally posted by: ALstonLoong
emm..wonder why intel dont wanna use SOI in prescott ...instead of waitting for 3 more years 2005.
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Partially depleted silicon (which is what AMD will be using) is not a total "win-win" situation... It has it's share of drawbacks. Namely a significantly higher cost and native defects in the silicon itself. Besides, probably the biggest benefit of SOI is to reduce junction capacitance, but Intel's designs already have a low junction capacitance. So, SOI wouldn't be much of a help for them at this time. Intel still may use SOI when fully depleted ("thin SOI") becomes mature... but we'll see.

Strained Silicon, on the other hand, is pretty much a "win-win" situation. There's a couple percentage point increase in cost, but not the 5x-6x cost like SOI. And the SS wafers have no more native defects than current silicon. As long as you have gate leakage and junction capacitance (relatively) under control, going this route is a no-brainer.

Originally posted by: SexyK
So when is your sig going to switch over to ".09µ Lithography Technician, Intel Corp." :D
Hopefully sooner rather than later!
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Ah... One must have patience, Grasshoppa! :)

Originally posted by: ElFenix
by mid 2k3 amd and everyone else might have figured out the voltage leaks at .13. maybe.
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The amount of success Intel has had moving to the .13µ process is really very impressive. One of the phrases I see frequently on here is "simple die shrink." Heh... Ain't nothin' simple 'bout it! ;)

With the rumors of both AMD and TSMC having low yields (some say that TSMC is only getting an average of 15% good die off each wafer :Q ), hopefully people are starting to realize how impressive Intel's .13µ process really is.


 
ScrapSilicon

ScrapSilicon

Lifer
Apr 14, 2001
13,625
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Originally posted by: Wingznut PEZ
Strained Silicon, on the other hand, is pretty much a "win-win" situation. There's a couple percentage point increase in cost, but not the 5x-6x cost like SOI. And the SS wafers have no more native defects than current silicon. As long as you have gate leakage and junction capacitance (relatively) under control, going this route is a no-brainer. With the rumors of both AMD and TSMC having low yields (some say that TSMC is only getting an average of 15% good die off each wafer ), hopefully people are starting to realize how impressive Intel's .13µ process really is.
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heh...he is talkin' about me when referring to the wasted die product/defects...ScrapSilicon ;) :D
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Wingznut

Elite Member
Dec 28, 1999
16,968
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Originally posted by: ScrapSilicon
heh...he is talkin' about me when referring to the wasted die product/defects...ScrapSilicon ;) :D
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And you... You are my mortal enemy! :frown:
 
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jbond04

Senior member
Oct 18, 2000
505
0
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Hey Wingznut PEZ, is strained silicon designed to prevent the leakage in circuits (like the problems that some people have when they overvolt Northwood processors too much)? I'm not asking whether or not it will allow better overvolting potential than Intel's .13um process, but I seem to remember Intel saying that as manufacturing processes got smaller and smaller, that leakage becomes a larger and larger issue.

My other question is about "sleep transistors". I think that the idea is that these are suppossed to only deliver current where needed in a chip (perhaps in a processor like the Banias), but that they also help to reduce the problems associated with leakage when moving to a lower process. Are these implemented in the .09um process or will they be implemented later (like .065um)? (I'm referring to this article.)
 
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Wingznut

Elite Member
Dec 28, 1999
16,968
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Originally posted by: jbond04
Hey Wingznut PEZ, is strained silicon designed to prevent the leakage in circuits (like the problems that some people have when they overvolt Northwood processors too much)? I'm not asking whether or not it will allow better overvolting potential than Intel's .13um process, but I seem to remember Intel saying that as manufacturing processes got smaller and smaller, that leakage becomes a larger and larger issue.
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No. Gate leakage is basically when the logic gate is closed (transistor "off") but yet the current decides to flow through the gate anyway. Insulation is the basic way to combat leakage. But yes, gate leakage and electromigration become more challenging with each process shrink.

Strained silicon basically allows the transistor to run faster... The current can flow faster than on standard or SOI silicon. This should be a rather significant improvement to performance at the same clockspeed.

Originally posted by: jbond04
My other question is about "sleep transistors". I think that the idea is that these are suppossed to only deliver current where needed in a chip (perhaps in a processor like the Banias), but that they also help to reduce the problems associated with leakage when moving to a lower process. Are these implemented in the .09um process or will they be implemented later (like .065um)? (I'm referring to this article.)
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Sorry man, I'm not at liberty to discuss anything but the info that Intel has released. :(

 
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ALstonLoong

Golden Member
Oct 24, 2000
1,627
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wingznut thanks for explaning the SOI . .....how about AMD Hammer's on-die memory controller? Seems like intel have to put more cache to keep up the speed .
 
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xxsk8er101xx

Senior member
Aug 13, 2000
298
0
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My question is, will i be able to upgrade my current P4 with a prescott?

I'm assuming not, only because the prescott i hear uses quad pumped 200mhz FSB. Making it 800mhz FSB.

I also read that Intel will release a .09micron Northwood? Which i would assume would be compatible? Now will this chip have 1MB of cache and all that stuff?

That would be really cool if Intel released a 533mhz FSB version of the prescott! I'd buy that ... Assuming my motherboard supports it that is.
 
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