I guess my point was that Dell would A.) Be designing 6 core consumer dies as we speak using ringbus. Thos 6 core dies would have internal latency comparable to current 7700's and the inter-CCX communication on Zen. B.) It would be too late to increase core count in the next 3 years. Any change they make in any dies now could hold them up to be as long as starting a new design now and rolling it when it's ready and would incur a long delay between product lines at some point (look what it did to AMD when they did that).Ring Bus for off-die communications? I don't know how that would work.
I'd think EMIB for consumers will be just to connect cores with the other parts. For example, you'd have 8 cores with memory controller in one die, and you'd have a beefy GPU in the other. 8 cores would be small on 10nm.
It'd still be cheaper for them to not use EMIB at all and fit everything in one die because consumer space is very price sensitive. I mean, for GT2 die they can do that with everything on one die rather than EMIB.
So my running theory is that they would if they felt the need to compete with AMD on core count in the next year or so start to emib staple their dies together. That way they still can keep their Pentium-i5 lineups, not have to use a server die for consumers. In the mid term (2-3 years) they may even use this method to get around LCC and MCC dies (probably not a good solution for the HCC stuff). This assumes that they feel pressured to make a move which can be debateable.