Intel Roadmap

[DX2Player]

Prescott CPUs will feature 800MHz Quad Pumped Bus, 1MB of L2 cache and the Hyper-Threading II technology in addition to new set of instructions known as PNI ? Prescott New Instructions. Apparently, the Prescott chips will live through 2004 and will be discontinued only in 2005. Implementation of 1066MHz Quad Pumped Bus and new Prescott ?B? core to support the new PSB in early 2005. Tejas should come to the market in late 2004 or early 2005 and feature another set of new instructions (TNI, Tejas New Instuctions) as well as new Hyper-Threading technology. Tejas chips will be shrunk to 65nm technology in late 2005 or early 2006 and receive 2MB of L2 cache and 1200MHz Quad Pumped Bus in addition to higher core-clock.

Prescott
Prescott 3.20GHz (800MHz QPB)
Prescott 3.40GHz (800MHz QPB)
Prescott 3.60GHz (800MHz QPB)
Prescott 3.80GHz (800MHz QPB)
Prescott 4.00GHz (800MHz QPB)
Prescott 4.20GHz (800MHz QPB)
Prescott 4.40GHz (800MHz QPB)
Prescott 4.60GHz (800MHz QPB)
Prescott 4.80GHz (800MHz QPB)
Prescott 4.80GHz (1066MHz QPB)
Prescott 5.00GHz (800MHz QPB)
Prescott 5.06GHz (1066MHz QPB)
Prescott 5.33GHz (1066MHz QPB)

Tejas
Tejas 5.33GHz (L2=1MB, 1066MHz QPB)
Tejas 5.60GHz (L2=1MB, 1066MHz QPB)
Tejas 5.86GHz (L2=1MB, 1066MHz QPB)
Tejas 6.00GHz (L2=2MB, 1200MHz QPB)
Tejas 6.13GHz (L2=1MB, 1066MHz QPB)
Tejas 6.30GHz (L2=2MB, 1200MHz QPB)
Tejas 6.60GHz (L2=2MB, 1200MHz QPB)
Tejas 6.90GHz (L2=2MB, 1200MHz QPB)
Tejas 7.20GHz (L2=2MB, 1200MHz QPB)

-XBits