Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E08 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (20A)Arrow Lake (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop OnlyDesktop & Mobile H&HXMobile U OnlyMobile H
Process NodeIntel 4Intel 20ATSMC N3BTSMC N3BIntel 18A
DateQ4 2023Q1 2025 ?Desktop-Q4-2024
H&HX-Q1-2025
Q4 2024Q1 2026 ?
Full Die6P + 8P6P + 8E ?8P + 16E4P + 4E4P + 8E
LLC24 MB24 MB ?36 MB ?12 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15

LNL-MX.png

Intel Core Ultra 100 - Meteor Lake

INTEL-CORE-100-ULTRA-METEOR-LAKE-OFFCIAL-SLIDE-2.jpg

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)



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Geddagod

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the account is private, all i see is replies
unfortunate. It's basically what Mikk said tho, MTL-S ES sampling, and EMR ES2 sampling
The existence of commercial ADM SKUs for Meteor Lake.
IIRC the first leaks for ADM were from Jim at adored TV about ARL? MTL does seem a bit ambitious, esp with all the new technologies already being packed into it.
I also believe Intel already claimed that the base tile would be passive, idk if having cache on it would still make it passive... not familiar with the terminology tbh.
Adamantium
Intel's codenames get geekier by the day :laughing:
 

moinmoin

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Exist50

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IIRC the first leaks for ADM were from Jim at adored TV about ARL? MTL does seem a bit ambitious, esp with all the new technologies already being packed into it.
I also believe Intel already claimed that the base tile would be passive, idk if having cache on it would still make it passive... not familiar with the terminology tbh.
Afaik, MTL w/ ADM was cancelled long ago. They might be using it as kind of a test platform, but I don't think we'll see real products using it. ARL might be a different story, but not sure what the situation there is.

Either way, however, it would require a separate base die.
 
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BorisTheBlade82

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this diagram from the patent above seems to be MTL-M with 2 RWC + 8 CMT.
it shows the SOC die will have 2 Crestmont cores, and the base die can be passive or with ADM cache.
Good spot.
It is quite surprising, that these schematics seem to represent a real product. Is this just laziness in Intel's patent department? Usually everyone plays the Hide & Seek game.
 

Geddagod

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Wonder what the 2 crestmont cores in the soc will be doing ?🤔
I'm guessing the idea is to simply be able to not use the core tile unless the user has to actually do something intensive. Should help battery life I'm guessing. It seems like a good way to counteract the inherent battery life loss of going chiplets for low power chips.
 

BorisTheBlade82

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I'm guessing the idea is to simply be able to not use the core tile unless the user has to actually do something intensive. Should help battery life I'm guessing. It seems like a good way to counteract the inherent battery life loss of going chiplets for low power chips.
Yep, exactly. This has been rumoured for a long time already. Up until now it wasn't that clear what kind of core this would be and how many of them. 2 Atom cores do sound like a good idea for heavy idle (AV, Cloud Sync, Background updates etc.)
 

coercitiv

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One of the power issues Intel had since many generations ago was keeping the entire CPU package at sleep when the Windows OS was idling. It's obviously not Intel specific, but back in the Haswell era for example they were the only option anyway.

For context, an idle well built and well configured Haswell-U laptop could hit 3-4W idle. The entire laptop. The setup was fragile though, with all kinds of things a user could do that would unknowingly prevent the CPU from entering Package C-States. I spend an entire afternoon trying to figure out why my notebook refused to idle properly, only to discover the culprit was a HDMI external connection (I was running the unit with an external monitor).

I've been moderately optimistic about hybrids in consumer laptops and a skeptic about their use in consumer desktop, but when it comes to including a few E cores in the SOC I would say I'm all in: it's a very good idea with lots of potential for power usage optimization.
 
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Exist50

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Good spot.
It is quite surprising, that these schematics seem to represent a real product. Is this just laziness in Intel's patent department? Usually everyone plays the Hide & Seek game.
Yeah, it's pretty funny that they've just had that sitting in the open for who knows how long now. Presumably patent applications go through legal, but not marketing. Someone found a loophole, lol.

But ultimately, don't think it really matters. Intel's done a pretty poor job of keeping Meteor Lake secret. Too many MTL refugees floating around to keep things quiet, imo.
 
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Exist50

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Yep, exactly. This has been rumoured for a long time already. Up until now it wasn't that clear what kind of core this would be and how many of them. 2 Atom cores do sound like a good idea for heavy idle (AV, Cloud Sync, Background updates etc.)
I mentioned what I thought to be the config a while ago, but it's good to get real confirmation. https://forums.anandtech.com/thread...-rapids-thread.2509080/page-619#post-40743174

I think on paper, the idea is good. Will have to see how it works out in practice. They've added yet another layer of scheduling complexity, but hopefully they've had enough time to sort out the implications there with Microsoft.
 

Geddagod

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Wait wait wait. So we are going to be seeing crestmont on Intel 4 AND TSMC 5nm? This is going to be fun ;)
Only problem is idk if Intel is going to provide a die shot of the SOC tile, they are pretty good at providing die shots when asked though...
Also I really hope the crestmont on the soc tile will be the same as the one on the CPU tile design wise. Idk if Intel would want to put in the extra resources into changing core design for the SOC tile.
 
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Henry swagger

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Wait wait wait. So we are going to be seeing crestmont on Intel 4 AND TSMC 5nm? This is going to be fun ;)
Only problem is idk if Intel is going to provide a die shot of the SOC tile, they are pretty good at providing die shots when asked though...
Also I really hope the crestmont on the soc tile will be the same as the one on the CPU tile design wise. Idk if Intel would want to put in the extra resources into changing core design for the SOC tile.
This the first intel cpu ip on a tsmc node ?
 

A///

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Money quote:
"Next generation client SoC architectures may introduce large on-package caches, which will allow novel usages. Access time for the L4 (e.g., "Adamantine" or "ADM") cache may be much less than the DRAM access time"
that makes more sense than adamantium which is a term used in marvel comics and film. large difference between it and the correct term adamantine. i look forward to the performance if it comes to client systems.
 

AMDK11

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Maybe Meteorlake-S will actually be such a big positive surprise that Intel is so careful about the details. At worst, it will be bad or so-so.

RaptorLake refreshed may be a nod to LGA1700 as Meteorlake-S will be on LGA1851.
 
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