Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

[Tigerick]

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.





Intel Core Ultra 100 - Meteor Lake



As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

 

[Det0x]

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Gaming averages at 1080p. Between 10-15%, depending on the benchmarks used.

Pick whatever game collection you want, which dictates if its 10%, 15%, 20% or 25%
It dont really matter for the point i'm trying to make..
The performance increase going from vanilla Z5 to Z5X3D will be larger than going from vanilla Z4 to Z4X3D
And since i have already said too much, i will leave it at that

 

[del42sa]

https://videocardz.com/newz/intel-s...performance-new-arrow-lake-battlemage-updates

 

[Henry swagger]

https://videocardz.com/newz/intel-s...performance-new-arrow-lake-battlemage-updates

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ipc will be high from what intel is hinting at .. 20% ipc is still my projection 🤔😁🥇

 

[TwistedAndy]

LPE and E live on the same tile. And they have the new core topology (Which I believe debuts with ARL? Not sure) which allows LPE cores to be used on any workloads. It's a proper, Arm like, multi-cluster scheduler scheme this time. Unlike MTL weird one.

Arrow Lake is expected to use a very similar topology to Meteor Lake.

10-15% difference in package power is 4-5% in system power. The changes at the package level can induce a change elsewhere, but Meteorlake battery life tests basically confirm they basically are back to the pre-Icelake era. They regressed since then.

Meteor Lake is probably below the initial Intel's targets, but it's pretty good in terms of battery life and power consumption under light loads:



~10-20 hours under the Notebookcheck's web surfing test is a good result.

Obviously, battery life is not the best metric for measuring power efficiency, but it's pretty representative.

 

[Thunder 57]

ipc will be high from what intel is hinting at .. 20% ipc is still my projection 🤔😁🥇

Than what? RPL?

 

[DavidC1]

Percentages multiply, not add/subtract.

This part isn't adhered to as strictly as people think. The original Pentium Pro reveal by Intel showed percentages as additions. When you consider that the CPU gets further from the memory as clock increases, then the small difference gets lost through noise.

Also we must remember during the sane days Intel used to give a range rather than oddly specific numbers. It was "15-20%" rather than "19%" which is silly to the level of retarded. But the x86 competition also decided to copy them in that regard too.

Arrowlake is 10-15% faster per clock, which is almost Haswell/Skylake levels of gains(or lack thereof).

Obviously, battery life is not the best metric for measuring power efficiency, but it's pretty representative.

But that's what people care about. Load battery life is essentially dependent on TDP. It's battery life that's difficult to achieve.

The system has a huge 99WHr battery, which is the absolute limit. At 50WHr which used to be standard until not too long ago, it's mediocre at best. It's Kabylake levels.

 

[SiliconFly]

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[Det0x]

At this point, I don't expect much from competition. Twitter/X has already labelled Zen 5 as Zen 5% due to the meager performance increase. ARL-S is easily gonna surpass Zen 5 this generation. I think it's gonna take a X3D to even barely compete with the top end ARL sku. Now it makes sense why Intel is going for a simple ARL refresh next year instead of a significant upgrade.

Well, its one thing to think, hope and expect
But its a other thing when you have hardware in hand

Lets just say we will get a repeat in the builders thread, come embargo date

 

[Hitman928]

This part isn't adhered to as strictly as people think. The original Pentium Pro reveal by Intel showed percentages as additions.

Then they did it wrong. This isn’t some recommended guidance, it’s just how the math works.

 

[Det0x]

nevermind, posted in wrong thread

 

[AcrosTinus]

I went through the entire release news of the competition, the ball is now in Intel's court.

Give me 10% more ST perf. and 75W less peak power usage and I'm good. Maybe make sure you don't lose the low latency advantage due to the tiles.

Restrict everything to solid defaults and leave performance on the table ! Revive the OC part of "K" instead of giving us max. OC CPUs with no headroom and high voltage.

 

[maddie]

At this point, I don't expect much from competition. Twitter/X has already labelled Zen 5 as Zen 5% due to the meager performance increase. ARL-S is easily gonna surpass Zen 5 this generation. I think it's gonna take a X3D to even barely compete with the top end ARL sku. Now it makes sense why Intel is going for a simple ARL refresh next year instead of a significant upgrade.

Two threads, two poles and none for the main.

 

[Tup3x]

I went through the entire release news of the competition, the ball is now in Intel's court.

Give me 10% more ST perf. and 75W less peak power usage and I'm good. Maybe make sure you don't lose the low latency advantage due to the tiles.

Restrict everything to solid defaults and leave performance on the table ! Revive the OC part of "K" instead of giving us max. OC CPUs with no headroom and high voltage.

10% more performance (doesn't hurt if applies to MT too) and power usage between 140W-175W for 7 & 9 tier. That would be win.

 

[511]

Ultra 5 at max 125W PL2 would be the best thing

 

[SiliconFly]

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[jdubs03]

Interesting choice there. Probably a cost saving measure, but not sure that is really a value add. Only for H-series SKUs.

Intel Core Ultra 200H "Arrow Lake-H" to feature two types of Efficient cores: Skymont and Crestmont - VideoCardz.com

Mobile Arrow Lake: Not just Lion Cove and Skymont Intel has issued patches for the upcoming Arrow Lake-H series. Intel might be quiet about its next-gen client CPU series, but preparations are underway behind the scenes before the company publicly announces it. The Arrow Lake series will launch...

videocardz.com

 

[Philste]

Interesting choice there. Probably a cost saving measure, but not sure that is really a value add. Only for H-series SKUs.

It's known for ages that Arrow Lake reuses Meteor Lakes SoC-Tiles, so it was clear it will also have 2 Crestmont cores.

 

[IEC]

You guys are setting yourselves up for disappointment if you believe in SiliconFly's fantastical optimism.

 

[AcrosTinus]

You guys are setting yourselves up for disappointment if you believe in SiliconFly's fantastical optimism.

SiliconFly is right though, expecting 10% more performance, as I do as well, is within what is possible.

 

[inf64]

SiliconFly is right though, expecting 10% more performance, as I do as well, is within what is possible.

For MT scenarios yes.

 

[H433x0n]

SiliconFly is right though, expecting 10% more performance, as I do as well, is within what is possible.

It’s within the realm of possible but probably like a 1 in 20 chance of 10% 1T performance increase.

 

[SiliconFly]

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[Tup3x]

To be honest, the only thing I expect is much lower power consumption while performance is probably about the same.

 

[SiliconFly]

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[Tup3x]

Tbh, I don't think even Intel can squander a 14% IPC increase to "probably about the same". Not feasible at all.

Well, I sure hope that's not the case but considering what AMD just cooked... It sure is possible that it improves every aspect but who knows.