Discussion Intel Meteor, Arrow, Lunar & Panther Lakes Discussion Threads

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Tigerick

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PantherLake.png

LNL.png

As Hot Chips 34 starting this week, Intel will unveil technical information of upcoming Meteor Lake (MTL) and Arrow Lake (ARL), new generation platform after Raptor Lake. Both MTL and ARL represent new direction which Intel will move to multiple chiplets and combine as one SoC platform.

MTL also represents new compute tile that based on Intel 4 process which is based on EUV lithography, a first from Intel. Intel expects to ship MTL mobile SoC in 2023.

ARL will come after MTL so Intel should be shipping it in 2024, that is what Intel roadmap is telling us. ARL compute tile will be manufactured by Intel 20A process, a first from Intel to use GAA transistors called RibbonFET.



Comparison of upcoming Intel's U-series CPU: Core Ultra 100U, Lunar Lake and Panther Lake

ModelCode-NameDateTDPNodeTilesMain TileCPULP E-CoreLLCGPUXe-cores
Core Ultra 100UMeteor LakeQ4 202315 - 57 WIntel 4 + N5 + N64tCPU2P + 8E212 MBIntel Graphics4
?Lunar LakeQ4 202417 - 30 WN3B + N62CPU + GPU & IMC4P + 4E08 MBArc8
?Panther LakeQ1 2026 ??Intel 18A + N3E3CPU + MC4P + 8E4?Arc12



Comparison of die size of Each Tile of Meteor Lake, Arrow Lake, Lunar Lake and Panther Lake

Meteor LakeArrow Lake (20A)Arrow Lake (N3B)Arrow Lake Refresh (N3B)Lunar LakePanther Lake
PlatformMobile H/U OnlyDesktop OnlyDesktop & Mobile H&HXDesktop OnlyMobile U OnlyMobile H
Process NodeIntel 4Intel 20ATSMC N3BTSMC N3BTSMC N3BIntel 18A
DateQ4 2023Q1 2025 ?Desktop-Q4-2024
H&HX-Q1-2025
Q4 2025 ?Q4 2024Q1 2026 ?
Full Die6P + 8P6P + 8E ?8P + 16E8P + 32E4P + 4E4P + 8E
LLC24 MB24 MB ?36 MB ??8 MB?
tCPU66.48
tGPU44.45
SoC96.77
IOE44.45
Total252.15



Intel Core Ultra 100 - Meteor Lake

INTEL-CORE-100-ULTRA-METEOR-LAKE-OFFCIAL-SLIDE-2.jpg

As mentioned by Tomshardware, TSMC will manufacture the I/O, SoC, and GPU tiles. That means Intel will manufacture only the CPU and Foveros tiles. (Notably, Intel calls the I/O tile an 'I/O Expander,' hence the IOE moniker.)

Clockspeed.png
 
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uzzi38

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SiliconFly

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Meteor Lake is a little better than Raptor Lake mobile it appears. Kind of blah overall for me because Intel set us up to have our socks knocked off.
On the other hand, the fact that they got all those tiles, Foveros, NPU, etc... working is kind of impressive.
Hopefully we'll see the performance end of things with Arrow and Lunar Lake because AMD is definitely going to up the ante with Zen 5.
When I go for my next build I'm going to have to take a hard look at Zen 5 and ARL. Might be time for my first AMD build!
Even though Meteor Lake has got all those tiles, Foveros, NPU, etc... working, it's still basically a CPU with sub-par performance. I starting to think Meteor Lake is a dud (considering lack of proper reviews this late in the cycle). And I would recommend ppl not to recommend it to others until Intel fixes the underlying issues. Or even skip this generation all-together.
 

DavidC1

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AMD was doing pretty well from a technological point-of-view up until Conroe, which of course is why Intel made a 180 from Netburst to Core. Conroe was monumental, nearly doubling the IPC of the last iteration of the P4. In fact, it put them so far ahead of AMD that they coasted on it for years and that is part of the reason they are struggling today. Don't underestimate Conroe because it didn't have any competition. It didn't have any competition because it was that good.
Intel's designs were so behind, despite the massive process lead, it often lost. Also, Conroe was on Intel's 65nm process while the competing Athlon 64 X2 was on 90nm, even though Intel's 90nm beat that too.

Had it been on the 90nm process, the top CPU may have been the 2.4GHz(E6600 level) rather than 2.93GHz which would have changed the picture dramatically. Actually, with the much larger die size, they might have to cut back on some performance features too.

Conroe and Sandy Bridge uarch was good, but nowhere stellar as PC enthusiast folks would like to see as. It only did in the vacuum chamber of Windows PCs being the only compute market. In between that they stagnated with many 5-10% improvements every 2-3 years.

With Haswell, they could achieve battery life gains only by cutting out the performance gains. It almost looked like we were at the end of big gains until Apple and ARM competitors surpassed them and brought tremendous improvements every year.

This is A9X vs Broadwell. So it was during the "peak days" of Intel:

A Tablet chip being able to match a Notebook chip using far more power, size, and cost was just mindblowing. TSMC "16nm" vs Intel 14nm too. The gains weren't limited to Apple. Though not as impressive, ARM vendors improved at a vast pace too. The reality distortion field and excuses that Geekbench was crap and that it used a different ISA was burst with M1.

If you want PPC of Lion Cove/Zen 5, you can just buy a device using Cortex X4.
 

Abwx

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Intel's designs were so behind, despite the massive process lead, it often lost. Also, Conroe was on Intel's 65nm process while the competing Athlon 64 X2 was on 90nm, even though Intel's 90nm beat that too.

Had it been on the 90nm process, the top CPU may have been the 2.4GHz(E6600 level) rather than 2.93GHz which would have changed the picture dramatically. Actually, with the much larger die size, they might have to cut back on some performance features too.

You could add that the AX2 had only 173M transistors and that was including the MC while the 225M transistors fat C2D had it in an external chipset, once the AX2 was shirinked to 65nm it regained the perf/watt crown quite easily.
 
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Hulk

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Intel's designs were so behind, despite the massive process lead, it often lost. Also, Conroe was on Intel's 65nm process while the competing Athlon 64 X2 was on 90nm, even though Intel's 90nm beat that too.

Had it been on the 90nm process, the top CPU may have been the 2.4GHz(E6600 level) rather than 2.93GHz which would have changed the picture dramatically. Actually, with the much larger die size, they might have to cut back on some performance features too.

Conroe and Sandy Bridge uarch was good, but nowhere stellar as PC enthusiast folks would like to see as. It only did in the vacuum chamber of Windows PCs being the only compute market. In between that they stagnated with many 5-10% improvements every 2-3 years.

With Haswell, they could achieve battery life gains only by cutting out the performance gains. It almost looked like we were at the end of big gains until Apple and ARM competitors surpassed them and brought tremendous improvements every year.

This is A9X vs Broadwell. So it was during the "peak days" of Intel:

A Tablet chip being able to match a Notebook chip using far more power, size, and cost was just mindblowing. TSMC "16nm" vs Intel 14nm too. The gains weren't limited to Apple. Though not as impressive, ARM vendors improved at a vast pace too. The reality distortion field and excuses that Geekbench was crap and that it used a different ISA was burst with M1.

If you want PPC of Lion Cove/Zen 5, you can just buy a device using Cortex X4.
Intel didn't need the process advantage with Conroe. It had much better IPC compared to the Athlon, the process advantage only made it even better. Conroe is the beginning of what "shut down" AMD until Zen. Everybody will have their own opinion of course, but having followed the microprocessor industry quite closely from my Atari 800 onwards I cannot remember a more monumental release than Conroe. Coming from my P4 3.06 Northwood, which was one of the better P4's, the difference in performance was astounding. The second largest performance increase for me was from my 486 DX33 to a Pentium 90. That was also massive. CorelDraw went from unusable to usable.
 

Abwx

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Intel didn't need the process advantage with Conroe. It had much better IPC compared to the Athlon, the process advantage only made it even better.

Much better is a stretch, guess that you looked at AT review wich was starting with a wall of Sysmark "benches" from the infamous Bapco, and at the time Cinebench wasnt well known but in most significant benches the gap wasnt what people think it was nowadays.

 

Markfw

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Much better is a stretch, guess that you looked at AT review wich was starting with a wall of Sysmark "benches" from the infamous Bapco, and at the time Cinebench wasnt well known but in most significant benches the gap wasnt what people think it was nowadays.

Ahh.... The conroe days... I was 100% conroe for years....... Until Zen hit in 2017
 
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JM Popaleetus

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heatware.com

Rumor mill in full swing.
Golden Pig Upgrade also says Arrow Lake won't have hyper-threading, and most models won't be made at Intel; instead, they rely on TSMC's processes.
The final and most interesting claim from Golden Pig Upgrade is that Intel's 20A node will only be used for midrange Arrow Lake compute tiles with six P-cores and eight E-cores.
 
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AMDK11

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The plan with NetBurst was to achieve 10 Ghz, with a low IPC design that could be run at very high clock speeds. They couldn't get the power usage/heat under control though, so Core was the pivot to a design with much higher IPC, designed to work with lower clock speeds.
This was the premise of Netbrust. Apparently only a 1-way decoder and ALU units clocked twice as high as the core itself, but the core was actually not that simple. Pentium 4 (Netbrust) had in some respects very advanced logic, mainly Front End and L0 cache of decoded micro instructions, as well as predictor and prefetching, which in an improved form found their way to subsequent generations of Core i.

At the time, it may not have stood out from the competition, but thanks to its higher clock speed and SSE2, it performed quite well at the time.

Conroe is a direct descendant of Banias and Yonah. Conroe's plan and the start of the project had to start a few years earlier (2002-2003?) and already then Intel knew that the time of Pentium 4 was already numbered, but until Conroe was ready, Intel had to push Netbrust.
 

Hulk

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Much better is a stretch, guess that you looked at AT review wich was starting with a wall of Sysmark "benches" from the infamous Bapco, and at the time Cinebench wasnt well known but in most significant benches the gap wasnt what people think it was nowadays.

Like I said it's subjective but when Conroe at 2.4GHz is beating Athlon at 2.8GHz by 20% in many benches that is significant. I didn't need to look back at that article. I remember it vividly. It should be required reading for Anandtech members who participate in the CPU forums;)

That huge Conroe lead is what put Intel to sleep for 10 years.
 

AMDK11

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Intel didn't need the process advantage with Conroe. It had much better IPC compared to the Athlon, the process advantage only made it even better. Conroe is the beginning of what "shut down" AMD until Zen. Everybody will have their own opinion of course, but having followed the microprocessor industry quite closely from my Atari 800 onwards I cannot remember a more monumental release than Conroe. Coming from my P4 3.06 Northwood, which was one of the better P4's, the difference in performance was astounding. The second largest performance increase for me was from my 486 DX33 to a Pentium 90. That was also massive. CorelDraw went from unusable to usable.
Conroe is a great project and this cannot be denied to Intel. I wrote that the Conroe core had 40% (I think more like +40-50%) more logic (transistors) compared to the Yonah core. This increase does not take into account the L2 cache.

The increase in transistors for SunnyCove compared to Skylake, i.e. +37%, also includes L2 512KB instead of 256KB. Also, the actual increase in the number of transistors for the SunnyCove(CypressCove) core alone is closer to ~25%. It's similar with GoldenCove.

However, Conroe(Core 2) compared to Yonah(Core(1)) and K8(A64) has an IPC advantage of +10-20% on average.

SunnyCove +18%
GoldenCove +19%

In its time, Conroe was a major micro-architectural achievement, but only because changes in earlier generations were very modest even though they introduced key techniques.

The pinnacle of solutions and the pinnacle of Conroe is Nehalem, where SMT was introduced and key Macro-Micro Fusion techniques ran in full x64 mode.

SandyBridge also introduced, for example, a physical registry file, but overall the logic expansion was relatively modest and conservative.

Since Conroe, only SunnyCove and GoldenCove have introduced such a large extension of the basic logic.

I assume that LionCove continues in this direction because it must be enough to power 2-3 generations of processors.
 
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Hulk

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Conroe is a great project and this cannot be denied to Intel. I wrote that the Conroe core had 40% (I think more like +40-50%) more logic (transistors) compared to the Yonah core. This increase does not take into account the L2 cache.

The increase in transistors for SunnyCove compared to Skylake, i.e. +37%, also includes L2 512KB instead of 256KB. Also, the actual increase in the number of transistors for the SunnyCove(CypressCove) core alone is closer to ~25%. It's similar with GoldenCove.

However, Conroe(Core 2) compared to Yonah(Core(1)) and K8(A64) has an IPC advantage of +10-20% on average.

SunnyCove +18%
GoldenCove +19%

In its time, Conroe was a major micro-architectural achievement, but only because changes in earlier generations were very modest even though they introduced key techniques.

The pinnacle of solutions and the pinnacle of Conroe is Nehalem, where SMT was introduced and key Macro-Micro Fusion techniques ran in full x64 mode.

SandyBridge also introduced, for example, a physical registry file, but overall the logic expansion was relatively modest and conservative.

Since Conroe, only SunnyCove and GoldenCove have introduced a significant expansion of the core logic.

I assume that LionCove continues in this direction because it must be enough to power 2-3 generations of processors.
Your post brings to mind what a detriment the node problems Intel had, first with 22nm and then with 14nm, to Intel's development of x86 architecture. While there were big and small architectural improvements through the tick-tock generations, the improvements were coming on a regular basis. Shrink the node, increase transistor density, use the additional transistors to improve the architecture. You could almost see Intel improving the front end, then on the next gen opening up the back end, etc..rinse repeat.

But when they stalled for a bit at 22nm (Broadwell) and then the big full stop at 14nm the additional transistor budget with a node shrink wasn't there so Intel basically had two options:
1. Make small incremental changes like tweaking the process to increase clocks, or add cores to keep up with the competition. The increase in die area for the additional cores could be substantiated by the need to compete with core count. IPC-wise they didn't need to compete so they didn't. This is in fact what I believe Intel did. It was a "wait and see" game for the node development.
2. They could have simply made the architectural improvements and made the die larger on the same node (Rocket Lake) and continued developing the architecture. We would have been 4 generations ahead right now albeit at a cost to Intel bottom line THEN as opposed to doing #1 and hurting their bottom line NOW.
 
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AMDK11

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From what I can see, the next significant redesign after Conroe was Nehalem. Sandy Bridge compared to Nehalem is only slightly larger (number of transistors) and more redesigned (optimization). Haswell is clearly larger and also redesigned (to a lesser extent). After Haswell, Skylake is another significantly larger and redesigned core.

With SunnyCove and GoldenCove, core expansion for Nehalem, Haswell and Skylake looks quite poor. Only Conroe can outperform them in terms of added transistors.

Many people say that it is still the same micro architecture with more resources, but when you look at the structure of a given generation of core, the logic was often redesigned and expanded with new control logic structures.

E2GW2NWXIAUbdBK


E2GXRKGXMAQYYDX


gw3h8fhvmoi11.png
 
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Abwx

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Like I said it's subjective but when Conroe at 2.4GHz is beating Athlon at 2.8GHz by 20% in many benches that is significant.

The only relevant benches here are renderings and encodings, and there s nowhere 20% gap between a 2.8 AX2 and a 2.4 C2D, eventually in a few Intel s designed Sysmark biaised benches.
 

Hulk

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The only relevant benches here are renderings and encodings, and there s nowhere 20% gap between a 2.8 AX2 and a 2.4 C2D, eventually in a few Intel s designed Sysmark biaised benches.
I beg to differ because I am quite sure that for me in 2006 those benches with the 20% difference were quite relevant. Conroe also had more throughput per clock in rendering and encoding but not as much.
 

Hulk

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From what I can see, the next significant redesign after Conroe was Nehalem. Sandy Bridge compared to Nehalem is only slightly larger (number of transistors) and more redesigned (optimization). Haswell is clearly larger and also redesigned (to a lesser extent). After Haswell, Skylake is another significantly larger and redesigned core.

With SunnyCove and GoldenCove, core expansion for Nehalem, Haswell and Skylake looks quite poor. Only Conroe can outperform them in terms of added transistors.

Many people say that it is still the same micro architecture with more resources, but when you look at the structure of a given generation of core, the logic was often redesigned and expanded with new control logic structures.

E2GW2NWXIAUbdBK


E2GXRKGXMAQYYDX


gw3h8fhvmoi11.png
Are those die shots at the bottom just for the CPU I assume?
Also, are they all to the same scale?
That's a nice find either way!
 

Hulk

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From what I can see, the next significant redesign after Conroe was Nehalem. Sandy Bridge compared to Nehalem is only slightly larger (number of transistors) and more redesigned (optimization). Haswell is clearly larger and also redesigned (to a lesser extent). After Haswell, Skylake is another significantly larger and redesigned core.

With SunnyCove and GoldenCove, core expansion for Nehalem, Haswell and Skylake looks quite poor. Only Conroe can outperform them in terms of added transistors.

Many people say that it is still the same micro architecture with more resources, but when you look at the structure of a given generation of core, the logic was often redesigned and expanded with new control logic structures.

E2GW2NWXIAUbdBK


E2GXRKGXMAQYYDX


gw3h8fhvmoi11.png
Sandy Bridge brought a new branch predictor unit, added a physical register file, and a 1.5K micro-op cache. Most benchmarking sites of the day including IXBT Labs and Semi Accurate saw Sandy as having 11.3% better IPC over Nehalem.

Also remember that we had those "ticks" back then, which generally brought a few percentage points. Those included Penryn, Ivy, and Broadwell.
 

DavidC1

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Sandy Bridge brought a new branch predictor unit, added a physical register file, and a 1.5K micro-op cache. Most benchmarking sites of the day including IXBT Labs and Semi Accurate saw Sandy as having 11.3% better IPC over Nehalem.
Sandy Bridge came at a time where SSDs were emerging and sites with SSDs used showed a greater gain in the range of 15-20%.
From what I can see, the next significant redesign after Conroe was Nehalem. Sandy Bridge compared to Nehalem is only slightly larger (number of transistors) and more redesigned (optimization). Haswell is clearly larger and also redesigned (to a lesser extent). After Haswell, Skylake is another significantly larger and redesigned core.
While Nehalem was significant in it's own, as a single threaded uarch, it wasn't much. Without the Turbo the gain was in the range of 5-10%, and sometimes resulted in performance loss.

While Sandy Bridge was not a huge expansion, it brought them using clever tricks and increased area/power efficiency.
-L1/L2 BTB combined into a single BTB that's twice the size of the two level one, and among other things that rebuilt branch predictor and improved performance without increasing resources
-uop cache, which was a vastly improved version of the trace cache concept achieving mostly the same with much smaller die/power cost
-Physical Register Files
-AVX256 by combining two ports into one saving die space
-Ring bus for much better scaling and performance
In fact, things like PRF is what determined many experts to conclude it was a true break away from the P6.
SandyBridge also introduced, for example, a physical registry file, but overall the logic expansion was relatively modest and conservative.

Since Conroe, only SunnyCove and GoldenCove have introduced such a large extension of the basic logic.
Not to mention SMT is about to go away with every other uarch not using it, the expansion of logic is what caused the problem.

Both Core 2 and Sandy Bridge are notable for increasing performance while reducing power used, because it does them without just expanding and doing them cleverly and new ideas.

Neither Sunny/Golden count in that regard which is why Rocketlake blows. Because if all you do is make basic blocks bigger, you run into the inverse square law of power/area.
 
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DavidC1

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Like I said it's subjective but when Conroe at 2.4GHz is beating Athlon at 2.8GHz by 20% in many benches that is significant. I didn't need to look back at that article. I remember it vividly. It should be required reading for Anandtech members who participate in the CPU forums;)

That huge Conroe lead is what put Intel to sleep for 10 years.
Yea we don't know the exact penalty if Conroe was on AMD's process. I remember when they were claiming awesome things with the 0.18u copper process, I found out later that Intel's 0.18u alu process had a drive current advantage of over 20%.

Hence the process leadership translated into:
+1 year TTM
+2 year performance
-1 year density

For high clocked, and big beautiful large chips, Intel process was the leader bar none, because focus on it was for many years, and mindset and culture developed around it. Often the transistor level advantage was such that the next generation competing process lost to previous generation Intel.

In the modern days where density matters, and you don't need super high clocks, their advantage diminishes significantly. Hence, TSMC.
You could add that the AX2 had only 173M transistors and that was including the MC while the 225M transistors fat C2D had it in an external chipset, once the AX2 was shirinked to 65nm it regained the perf/watt crown quite easily.
I could, but I'd be misleading.

Core 2: 293 million
A64 X2 5000+: 154 million

Core 2 has 4MB L2 while A64 X2 has 1MB total(512KB x2). Each MB of cache equals roughly 50 million transistors. So with 4MB L2, X2 would end up at 304 million transistors, and I/O and MC doesn't take many transistors.
 
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DavidC1

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What a sad state of affairs. Reliving past glories in this thread. Is there some deep psychological imperative at play here.
Nope. I'm saying most of Intel's achievements in the past have been greatly boosted by their massive process lead, and "legendary" achievements like Conroe and Sandy Bridge would have looked lot less impressive without it. In the early days, the Pentium Pro lead was nearly entirely attributed to their process.

Now they are fully exposed since their process team can't save them anymore.

I have to wonder how the landscape would have been today if laws opened up the x86 ISA so more than 3 vendors could use it(AMD/Intel/Via). The massive lawsuit against Transmeta and more recently Nvidia is quite telling.

History tells us that Andy Grove wanted to "crush AMD" but it was Gordon Moore that convinced him not to. AMD got their x86 license after a big battle too.
 

AMDK11

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Are those die shots at the bottom just for the CPU I assume?
Also, are they all to the same scale?
That's a nice find either way!
These are single x86 cores from different generations, scaled to approximate the differences in adding logic (transistors) to a given generation.

Yonah & Conroe 65nm
Penryn & Nehalem 45nm
Westmere & SandyBridge 32nm
IvyBridge & Haswell 22nm
Broadwell & Skylake 14nm

New core + more or less the same microarchitecture with minor tweaks:
Conroe & Penryn
Nehalem & Westmere
SandyBridge & Ivybridge
Haswell & Broadwell
 
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