• Guest, The rules for the P & N subforum have been updated to prohibit "ad hominem" or personal attacks against other posters. See the full details in the post "Politics and News Rules & Guidelines."

Discussion Intel leading customer for TSMC 3nm?

Page 7 - Seeking answers? Join the AnandTech community: where nearly half-a-million members share solutions and discuss the latest tech.

coercitiv

Diamond Member
Jan 24, 2014
4,546
6,258
136
A small bit from Intel's lobby towards EU regarding manufacturing subsidies:
Over the next decade we see that as a truly globally balanced supply chain, so that we'd see 30% in the U.S., 20% in Europe, and 50% in Asia, compared to 80% in Asia today.
From the video description:
Intel is accelerating investment in Europe and wants to enable the EU’s ambition to manufacture 20% of the world’s cutting-edge chips, by expanding its foundry services with appropriate government support.
 
Last edited:

Doug S

Senior member
Feb 8, 2020
772
1,089
96
I'm trying to learn, I'm not in the industry, please forgive the noob question.

What is the thing that you must learn in mass production that you cannot learn at small volume, R&D stage? To draw the analogy, is it like a clinical trial where you need huge population/test numbers to find the small problems that hurt yield/performance etc (like the blood clot problem with the Oxford/AZ vaccine, which is ~1 in 1M)? But probably you don't need huge volumes to find a problem that's affecting yield measurably (at say 0.1% level).

Related to that, it is claimed (for example here: https://stratechery.com/2018/intel-and-the-danger-of-integration/ ) that Intel's fab problems originates from controlling smaller fab market share, which is all getting concentrated to TSMC/Samsung at the leading edge. How much of this is true? I mean, sure, infinite money helps, and you can do crazy things like have multiple teams of engineers work in parallel on the same problem. But isn't most of the money used to build fabs going to setting up the factories, as opposed to paying + equipping a smallish elite team to figure things out?

It isn't a matter of mass production versus small volume. Learning/improvement in fabs is a matter of time. It takes around two months from the time a wafer enters production to when it exits, so if you make tweaks to fix problems, improve performance, improve yields etc. it takes a while before you know how well it worked. That's true whether you send one wafer through that line or 100,000 wafers.

Also consider the MASSIVE stranded investment if you have a fab line worth several billion in equipment and floor space sitting mostly idle while you send a handful of wafers through trying to figure things out. You need mass production to depreciate that investment, so the shorter the amount of development time before you enter mass production the better. Deliberately making that development time longer, even if you can get to the node after next a bit more quickly, doesn't make financial sense even if it might be possible in a technical sense.

To your last point, yes most of the money to build fabs is going to build/expand the building and equip it. Just because you hear that Intel is going to spend $50 billion in "R&D" that doesn't mean they all that money is going to developing a new process. The overwhelming majority is going to building/expanding fab buildings, and filling it with equipment ranging from insane levels of air handling, to water purification, to handling of toxic materials to all the machines that handle and make wafers including but certainly not limited to the giant EUV machines ASML sells.

I think it is safe to say that Intel has not shortchanged investment in actual R&D as far as developing new processes, so throwing more money at it isn't necessarily going to solve the problems they've been having. Whether it is a management problem, or losing top people problem, or something else I have no idea - but there's no way it is a "lack of investment" problem.

So no I don't buy the argument that the reason Intel is falling behind is having less fab share. If Intel had to sell their wafers at a price similar to TSMC's that would be a problem, but their average price per wafer is WAY higher, due to being able to charge a premium for x86 chips as the largest of only two suppliers. That "problem" of x86 wafers being worth more than any other wafers is why they only made a half hearted attempt to enter the foundry market before. How much money did they lose from x86 chip shortages caused by all the LTE modem chips they had to make for Apple? Those were sold at foundry like prices, not x86 CPU like prices, so every one they sold cost them in lost potential profit. They need to build enough capacity to insure they never run short for becoming a foundry to make sense.
 

Hitman928

Diamond Member
Apr 15, 2012
3,638
4,061
136
Why would Intel "stop producing"? iPad Pro is not a high volume product like iPhone, it can't soak up all of TSMC's N3 like they have been soaking up nearly all of N5 over the past year. Even if they also do an M3 SoC for the Mac in N3 that's still chickenfeed compared to iPhone wafer needs.

If Apple can't get N3 in time for the 2022 iPhone then their next high volume product will be the 2023 iPhone. TSMC will have brought a lot of additional N3 (and maybe N3P depending on when that's ready) capacity online between the launch of the 2022 and 2023 iPhone.
If TSMC starts volume production towards the end of 2022 and Apple wants volume for iPhone chip production in 1H23, that doesn't give TSMC a lot of bring up time for additional capacity. The rumors were that Apple was essentially eating up all of 5 nm capacity early on so I have to expect the same will be true for 3 nm given current demand for apple products.

If we look at what happened with 5 nm, TSMC went into risk production 1H19 and started volume production in 1H20, the next iPhone using 5 nm launched in Oct. 2020. TSMC said they hoped to double capacity on 5 nm after initial volume production by some time in 2021 (most likely end of) and triple by 2022.

For 3 nm, TSMC is saying risk production in 2021 and volume production in 2H22. If Apple tells TSMC they want as many wafers as 5 nm in 1H23 and Intel was (supposedly) buying up the majority of volume production in 2H22, I don't see how TSMC can increase volume to satisfy both parties in that time frame and one or the other is going to have to accept significantly reduced wafer allocation. If TSMC is able to bring up capacity on 3 nm much much faster than they could on 5 nm, then I guess this could work but I just don't find that probable.
 
Last edited:

Doug S

Senior member
Feb 8, 2020
772
1,089
96
If TSMC starts volume production towards the end of 2022 and Apple wants volume for iPhone chip production in 1H23, that doesn't give TSMC a lot of bring up time for additional capacity. The rumors were that Apple was essentially eating up all of 5 nm capacity early on so I have to expect the same will be true for 3 nm given current demand for apple products.

If we look at what happened with 5 nm, TSMC went into risk production 1H19 and started volume production in 1H20, the next iPhone using 5 nm launched in Oct. 2020. TSMC said they hoped to double capacity on 5 nm after initial volume production by some time in 2021 (most likely end of) and triple by 2022.

For 3 nm, TSMC is saying risk production in 2021 and volume production in 2H22. If Apple tells TSMC they want as many wafers as 5 nm in 1H23 and Intel was (supposedly) buying up the majority of volume production in 2H22, I don't see how TSMC can increase volume to satisfy both parties in that time frame and one or the other is going to have to accept significantly reduced wafer allocation. If TSMC is able to bring up capacity on 3 nm much much faster than they could on 5 nm, then I guess this could work but I just don't find that probable.

Apple doesn't need volume shipment of chips until ~ a month before the launch. I'm sure they'd prefer earlier so they don't have to be nervous about the timing, but being ready months earlier doesn't do much for them. That's why TSMC has tried to time their process rollouts to Apple's iPhone schedule.

From the sounds of things TSMC will have more N3 volume than N5 volume so I don't think it will be a problem. Even if it is only the same as N5 volume, Intel would be getting almost all the early N3 wafers, they can build up a stockpile of N3 chips so even if Apple gets most of the wafers for a quarter or two for the usual "new iPhone surge" Intel wouldn't have to stop selling. It is just a matter of inventory management, since it would be something they'd know of in advance.

We don't even know what Intel is going to be making in N3, and whether the PC market will still be at its current coronavirus bumped level or go back to where it was and continue its decade long decline. It can't be a server CPU, because Intel has a long qualification cycle. Most likely it will be high ASP laptop chips.

Apple may well launch the 2023 iPhone with N3P, which would not affect Intel's N3 wafer volumes at all. I don't think TSMC has made any statements as to when N3P will be ready, but since it is basically a tweak/refinement of N3 there's no reason they can't turn it around in 9 months instead of the usual 12. Worst case losing three months worth of tweaks might mean its not quite as big of an improvement compared to previous 'P' nodes. That wouldn't be much of a loss, since the 'P' nodes are pretty small improvements anyway.
 

Hitman928

Diamond Member
Apr 15, 2012
3,638
4,061
136
Apple doesn't need volume shipment of chips until ~ a month before the launch. I'm sure they'd prefer earlier so they don't have to be nervous about the timing, but being ready months earlier doesn't do much for them. That's why TSMC has tried to time their process rollouts to Apple's iPhone schedule.

From the sounds of things TSMC will have more N3 volume than N5 volume so I don't think it will be a problem. Even if it is only the same as N5 volume, Intel would be getting almost all the early N3 wafers, they can build up a stockpile of N3 chips so even if Apple gets most of the wafers for a quarter or two for the usual "new iPhone surge" Intel wouldn't have to stop selling. It is just a matter of inventory management, since it would be something they'd know of in advance.

We don't even know what Intel is going to be making in N3, and whether the PC market will still be at its current coronavirus bumped level or go back to where it was and continue its decade long decline. It can't be a server CPU, because Intel has a long qualification cycle. Most likely it will be high ASP laptop chips.

Apple may well launch the 2023 iPhone with N3P, which would not affect Intel's N3 wafer volumes at all. I don't think TSMC has made any statements as to when N3P will be ready, but since it is basically a tweak/refinement of N3 there's no reason they can't turn it around in 9 months instead of the usual 12. Worst case losing three months worth of tweaks might mean its not quite as big of an improvement compared to previous 'P' nodes. That wouldn't be much of a loss, since the 'P' nodes are pretty small improvements anyway.
Traditionally Apple launches new models in Sep. when possible. That means the chips need to be sent for production starting in April or so. If their next Iphone production schedule follows the Iphone12, they'll continue to need a large volume of chips into 1Q24 plus whatever other product lines they may introduce.

If 3 nm volume production starts toward the end of '22, that only gives Intel a couple of quarters to build inventory and then about a year of (presumably) ceding wafer allocation to Apple. I just don't see how they can sign up for a bleeding edge node for 6 months and then hop in the back seat for a year and that makes any kind of sense. I have zero inside info here so I certainly could be wrong, it just doesn't make any sense looking in from the outside. As far as N3p goes, I don't think this has even been officially announced? Even if it is a thing, the 'P' variants historically take at least an additional year to reach volume production which doesn't fit into this timeline.
 
  • Like
Reactions: Tlh97

Ajay

Diamond Member
Jan 8, 2001
9,455
3,931
136
Every time I've heard the idea of "skipping a node" to catch up suggested, either in the recent past or 20 years ago, process engineers have said that such a thing is almost impossible. A new node isn't a single change, it is dozens of changes that build on what came before. In order to skip a node you still have to develop all those incremental steps, because it isn't the same things that are changing between nodes.

If skipping a node was feasible we would have seen that happen before, but I can't think of a single case where anyone has ever skipped a node - let alone doing so anywhere near leading edge. Perhaps some tier two foundry could skip from 45nm to 28nm, but that's not the same thing.

And IBM's 2nm was just a technology demonstration. I'm sure TSMC and Samsung have 2nm wafers in their development fabs too. That doesn't mean they're ready to roll them out anytime soon. Even if IBM handed all their work over to Intel it isn't like they can skip a couple nodes and start shipping 2nm in 2024 to leapfrog TSMC. That's just not possible.
Yeah. Apparently, I'm on drugs. This is the second posting in the past couple of days that I'm wearing egg on my face. I know this to be the case, but blah....
 

Doug S

Senior member
Feb 8, 2020
772
1,089
96
Traditionally Apple launches new models in Sep. when possible. That means the chips need to be sent for production starting in April or so. If their next Iphone production schedule follows the Iphone12, they'll continue to need a large volume of chips into 1Q24 plus whatever other product lines they may introduce.
"Sent for production" means starting the wafers on their ~ two month long journey, or the completion of all the post-wafer steps like dicing, testing, packaging, stacking, etc. So sure starting the process sometime in April probably means getting the first production volume chips in July (there would be limited volume of "risk production" chips before then, but Apple may or may not consider those suitable for products shipped to customers)

So long as Apple is taking delivery by August 1st of production scale volume that's fine for iPhone assembly. They are doing "just in time" manufacturing like everyone else, stuff just needs to show up by the time it is needed not months in advance.

The problem is what is the definition of "begin mass production"? I've pointed this out before, it could mean when the first production volume wafers enter the first stage of production, actual shipment of finished packaged chips is commenced, or any point in between. It may mean different things for different companies, or even for the same company at different times depending on whether they are trying to impress investors or sandbag the competition.
 

Ajay

Diamond Member
Jan 8, 2001
9,455
3,931
136
"Sent for production" means starting the wafers on their ~ two month long journey, or the completion of all the post-wafer steps like dicing, testing, packaging, stacking, etc. So sure starting the process sometime in April probably means getting the first production volume chips in July (there would be limited volume of "risk production" chips before then, but Apple may or may not consider those suitable for products shipped to customers)
Supposedly, Apple used to *buy* risk production wafers. It was a way for them to help TSMC get up to speed on a new node. This put Apple first in line for *all* wafers on a given node. Not sure if this is still the case (TSMC was a smaller outfit when Apple started doing this). I would imagine that as the weeks clicked by, more and more of these risk wafers yielded product ready SoCs.
 

Doug S

Senior member
Feb 8, 2020
772
1,089
96
Supposedly, Apple used to *buy* risk production wafers. It was a way for them to help TSMC get up to speed on a new node. This put Apple first in line for *all* wafers on a given node. Not sure if this is still the case (TSMC was a smaller outfit when Apple started doing this). I would imagine that as the weeks clicked by, more and more of these risk wafers yielded product ready SoCs.

I have no information either way, but if they get enough of a discount to offset the reduced yield, why not?

Supposedly TSMC will be running 30k wpm in N3 risk production, and 105k wpm at volume production. Wasn't N5 at volume with 50k? If so that N3 risk production isn't far from N5 volume, and N3 volume will be more than double.

Seems like they could use risk production wafers for lower volume stuff like Macs if they wanted, especially if they were binning. Which they have been doing a bit (i.e. A12X vs A12Z, Jade-C "chop" if those rumors prove true)
 

Hitman928

Diamond Member
Apr 15, 2012
3,638
4,061
136
I have no information either way, but if they get enough of a discount to offset the reduced yield, why not?

Supposedly TSMC will be running 30k wpm in N3 risk production, and 105k wpm at volume production. Wasn't N5 at volume with 50k? If so that N3 risk production isn't far from N5 volume, and N3 volume will be more than double.

Seems like they could use risk production wafers for lower volume stuff like Macs if they wanted, especially if they were binning. Which they have been doing a bit (i.e. A12X vs A12Z, Jade-C "chop" if those rumors prove true)
I don't think there's any chance N3 starts off with 105 kwpm. I'm sure they'll get to that number as some point, but not right out of the gate. It will most likely be similar to N5 and start with ~50k with plans to expand volume over the course of 2 - 3 years.
 
  • Like
Reactions: Tlh97

Doug S

Senior member
Feb 8, 2020
772
1,089
96
I don't think there's any chance N3 starts off with 105 kwpm. I'm sure they'll get to that number as some point, but not right out of the gate. It will most likely be similar to N5 and start with ~50k with plans to expand volume over the course of 2 - 3 years.
Wouldn't the volume they plan to start with have to do with how many advance orders they've accepted? If Intel contacted them 18 months ago or whatever wanting to buy a ton of N3 wafers, and they already had Apple's orders booked, they'd want to insure sufficient production capacity is in place in time to fulfill those orders.

Otherwise all they could say is "hey we'll do our best" which would make it pretty hard for Intel to make plans. If that means doing 105k wafers on day one of volume production, so be it. If the orders booked say they only need 50k the first two quarters and then 105k due to Apple not making iPhone SoCs right away, that's what they'll do. The claim I saw is that they will go volume at 105k, but maybe that was some misunderstanding or botched translation, but I see no reason to say they definitely could not start at 105k if that's what is needed to fulfill their bookings.

I don't know how much lead time they would need if plans changed when Intel came along. For expanding an existing fab a year should be enough since the floor space exists so doing the construction "finishing" would mostly involve a lot of complicated plumbing, air handling and electrical work, I'd imagine. For the equipment, in particular scarce EUV machines, lead time might not help - but if the rumors Intel canceled/transferred some of their EUV orders to TSMC are true that could enable TSMC to go volume with N3 at a level higher than initially planned before Intel came on board.

I don't know how a fab ramp usually takes place. Is the "risk production" a single line, and they have other lines that are all set up and ready to go that only get the switch flipped so to speak, once they have achieved production worthy yield in risk? Or is risk just slower throughput in the lines that will be used for volume production?

The whole idea of risk production is unique to foundries, Intel doesn't have eat to the cost of running a bunch of SRAM test wafers that end up scrapped while they get the yield up. If they find only one good die on the very first wafer run with production masks, that's worth money to them and can be stockpiled. So Intel's announcement of "production" is probably pretty much in line with TSMC's announcement of risk production. Which means we probably can't use past experience with Intel's ramps (back when they were running like a machine, as TSMC does these days) as a guide to tell us how quickly TSMC can ramp when they decide it is time for "volume production".
 

Hitman928

Diamond Member
Apr 15, 2012
3,638
4,061
136
Wouldn't the volume they plan to start with have to do with how many advance orders they've accepted? If Intel contacted them 18 months ago or whatever wanting to buy a ton of N3 wafers, and they already had Apple's orders booked, they'd want to insure sufficient production capacity is in place in time to fulfill those orders.

Otherwise all they could say is "hey we'll do our best" which would make it pretty hard for Intel to make plans. If that means doing 105k wafers on day one of volume production, so be it. If the orders booked say they only need 50k the first two quarters and then 105k due to Apple not making iPhone SoCs right away, that's what they'll do. The claim I saw is that they will go volume at 105k, but maybe that was some misunderstanding or botched translation, but I see no reason to say they definitely could not start at 105k if that's what is needed to fulfill their bookings.

I don't know how much lead time they would need if plans changed when Intel came along. For expanding an existing fab a year should be enough since the floor space exists so doing the construction "finishing" would mostly involve a lot of complicated plumbing, air handling and electrical work, I'd imagine. For the equipment, in particular scarce EUV machines, lead time might not help - but if the rumors Intel canceled/transferred some of their EUV orders to TSMC are true that could enable TSMC to go volume with N3 at a level higher than initially planned before Intel came on board.

I don't know how a fab ramp usually takes place. Is the "risk production" a single line, and they have other lines that are all set up and ready to go that only get the switch flipped so to speak, once they have achieved production worthy yield in risk? Or is risk just slower throughput in the lines that will be used for volume production?

The whole idea of risk production is unique to foundries, Intel doesn't have eat to the cost of running a bunch of SRAM test wafers that end up scrapped while they get the yield up. If they find only one good die on the very first wafer run with production masks, that's worth money to them and can be stockpiled. So Intel's announcement of "production" is probably pretty much in line with TSMC's announcement of risk production. Which means we probably can't use past experience with Intel's ramps (back when they were running like a machine, as TSMC does these days) as a guide to tell us how quickly TSMC can ramp when they decide it is time for "volume production".
These giant fabs are built in phases which are planned years in advance. Much like node progression, the way they build out doesn't allow for just skipping the build out steps and jumping straight to phase 2 before phase 1 is complete. If they could just build out the volume due to demand like that, they would have done it already as they would have plenty of demand with or without Intel. Companies adjust their plans to TSMC's schedule, not the other way around.

After a little searching I found a quote from TSMC's chairman at what the U.S. would call a ribbon cutting ceremony for their 3 nm fab where he states how much volume the fab will have at the start of volume production:

Mark Liu said:
Mark Liu, said that the facility will be world's most advanced logic process plant, and help maintain TSMC's leadership. Once up to speed the Tainan plant will have a production capacity of around 55,000 WPM – hopefully that will be plenty to sate demand of its N3 output. This capacity will come online in H2 2022.
55 kwpm is right in line with expectations for the phase 1 build out. The capacity will continue to expand to over double that amount but it will also be done in phases and most likely take 2 - 3 years to fully complete.
 

lobz

Golden Member
Feb 10, 2017
1,812
2,342
136
Yeah. Apparently, I'm on drugs. This is the second posting in the past couple of days that I'm wearing egg on my face. I know this to be the case, but blah....
Can you hit me up? I like wearing eggs on my face.
 
  • Haha
Reactions: Ajay

lobz

Golden Member
Feb 10, 2017
1,812
2,342
136
No, the article does NOT say that. At least not the article linked at the start of this thread.
(...)
That's fair. I've read a couple of different ones (not just wccf) and they refer to 'Nikkei's sources' when stating that - but this original one does in fact not say that, so in that case, sorry and thanks for... reading the article :tearsofjoy:

If all this timeline lines up perfectly with Apple's plans anyway, I can imagine a world where Intel's a co lead on a brand new TSMC process. Not convinced at all, but not ruling it out either.
 

jpiniero

Lifer
Oct 1, 2010
10,082
2,339
136
55 kwpm is right in line with expectations for the phase 1 build out. The capacity will continue to expand to over double that amount but it will also be done in phases and most likely take 2 - 3 years to fully complete.
55 kwpm and sharing that with Apple doesn't seem like it would be enough. Almost ensures that it will share volume with 10 nm products.
 

Doug S

Senior member
Feb 8, 2020
772
1,089
96
55 kwpm and sharing that with Apple doesn't seem like it would be enough. Almost ensures that it will share volume with 10 nm products.
Well of course Intel will be sharing volume with 10nm products, I don't see how anyone could think otherwise. The only products it makes sense to fab in N3 are ones where the additional performance / reduced power allow them to charge a premium over what they could charge for the best they could in their 10nm. i.e. laptop and desktop stuff sold for $500+, or server stuff selling for $5000+.

They must continue to fill their 10nm fabs as much as possible otherwise the depreciation allocated per CPU is higher and their margins take a hit which Wall Street won't like - or they have to take a big writedown of lost depreciation in the future, which Wall Street would like even less!
 
  • Like
Reactions: Tlh97

jpiniero

Lifer
Oct 1, 2010
10,082
2,339
136
Well of course Intel will be sharing volume with 10nm products, I don't see how anyone could think otherwise. The only products it makes sense to fab in N3 are ones where the additional performance / reduced power allow them to charge a premium over what they could charge for the best they could in their 10nm. i.e. laptop and desktop stuff sold for $500+, or server stuff selling for $5000+.
I wouldn't say charge a premium, I would say remain competitive. That's really why they are doing this - 10 nm isn't going to cut it where the performance/power is needed. There's still going to be plenty of opportunities to use the older fabs - the Meteor/Granite base die is probably 10 nm.
 
  • Like
Reactions: Tlh97

Doug S

Senior member
Feb 8, 2020
772
1,089
96
I wouldn't say charge a premium, I would say remain competitive. That's really why they are doing this - 10 nm isn't going to cut it where the performance/power is needed. There's still going to be plenty of opportunities to use the older fabs - the Meteor/Granite base die is probably 10 nm.
Sure they'll charge a premium - Intel ALWAYS does for the highest SKUs. That's why you have to pay 4-5x more to get another 10-15% more performance going from the mainstream SKUs to the highest end SKU, they've always done that. Its just that performance/power only matters for a minority of Intel's CPU volume. The average consumer doesn't know or care what Intel's model number gobbledygook means.

Heck, I don't really know other than 'K' means overclockable, and 'U' means lowest power, and theoretically i3 < i5 <i7 < i9 but is actually meaningless since you need to look at ark to do a feature comparison between two different SKUs with stuff that some i5s have left out of some i7s and so forth. Unless you buy a PC that's advertised as having their best performance or best battery life, the difference between their 10nm and TSMC N3 is irrelevant to the average consumer. They will never know the difference.

I mean, right now 10nm is Intel's top of the line across the board. The only thing they need N3 for is the halo products at the top end that replace the current top end (which will move down a bit to become the upper middle tier)

So if you buy a random $800 Dell PC or laptop with an Intel CPU it is highly likely to contain a 10nm CPU. Only if you buy a laptop with one of the top two or three fastest 'U' SKUs, or one with the fastest / most cores overall will you get an N3 CPU. If you buy some Alienware gamer special, or buy one of the top end 'K' processors to overclock, you'll get an N3, otherwise 10nm.

Servers are where they will probably ship the most N3 wafers, because they need more cores to compete with AMD's offerings. Those won't appear right away though, Intel has a pretty long qualification process for server CPUs which is why you always see server CPUs come last after laptop and desktop with any new Intel process. It'll be the same with TSMC fabbed server CPUs.

The N3 CPUs will probably have a different architecture (since they will have more transistors to play with) but I'll bet they don't add anything big with it - they won't want people to look too closely at the difference between Intel fabbed and TSMC fabbed CPUs. Putting some special feature like AVX-1024 only on N3 CPUs (unless it is a niche line like for HPC) would be counterproductive to that end.
 

A///

Golden Member
Feb 24, 2017
1,022
745
136
That wasn't a precondition of the statement to which I replied, though.
Never said it was. I was pointing it out. Frankly I don't care about either company enough to be a "fan boy" or any other derivative of that phrase. Who can offer me the best performing product when I'm shopping? That's all I've ever cared about.

Frankly, I don't understand why people want AMD to fail or why they want Intel to fail. Did they forget how the 10 years before Zen came along was like?
 

DrMrLordX

Lifer
Apr 27, 2000
17,799
6,791
136
Never said it was. I was pointing it out.
. . . okay. Not sure how that's germane to the discussion, per se.

Frankly I don't care about either company enough to be a "fan boy" or any other derivative of that phrase. Who can offer me the best performing product when I'm shopping? That's all I've ever cared about.

Frankly, I don't understand why people want AMD to fail or why they want Intel to fail. Did they forget how the 10 years before Zen came along was like?
All I can really say in response is that Intel needs to get their act together if you want the PC market to remain semi-healthy. Even those who disapprove of Intel's past behavior must see that There's a lot of "what ifs" that could ruin the market for everyone, drive up prices, and cause PC hardware development to stagnate. There's a lot riding on:

Intel getting high enough yields with 10SF/ESF to replace most of their "big die" 14nm products through 2022
Intel getting any kind of yields with 7nm to maximize their (likely) low wafer output
Intel getting help from TSMC long enough for them to acquire sufficient EUV equipment to shift to a 5nm node or a 2nm node.

If too many of those conditions are not met, then things could go sideways, fast. The market is already signaling that it doesn't want any more Cascade Lake-SP; in fact, a lot of orgs are going to be looking at replacing their old 14nm hardware sometime between 2021-2023, if they haven't started looking at that already, and that's not counting future scaleouts. Will Intel be ready to maintain their market share with Sapphire Rapids leading the way? They've already shown that they aren't serious about saturating the market with IceLake-SP (or at least, not yet; it's also unclear whether or not the market will embrace that product anyway). And that's just through 2022. If Intel survives that gauntlet with their DCG unit intact, then they have more hurdles to clear. No easy lunch for Intel, no sir.
 
  • Like
Reactions: moinmoin and Tlh97

bryanW1995

Lifer
May 22, 2007
11,143
32
91
Hmmm lets see, TSMC enables it competitor to render its customers uncompetitive.
Difficult to digest.
Unless there is so much capacity to go around that it makes no difference. But if this is the case Intel Foundry business is dead on the water.

Besides that, architecture is the other big factor. We are not talking about off the shelf ARM designs here where only securing the best node will give you the edge.
Additionally, N7-> N5 Apple got only 1.5x scaling not 1.8x as advertised by TSMC. N5 --> N3 probably less than 1.35x vs advertized 1.7x. Ignoring efficiency, N5P will have comparable perf to N3

My bet is that some "Analyst" want to tank AMD shares to acquire lots of it.
I haven't been paying much attention since my last upgrade (2013 lol), but from what I can tell it looks like AMD is in a MUCH better spot today than they were back then. tbh I thought they were on the verge of bankruptcy for years and now they have a $100b stock valuation.
 

ASK THE COMMUNITY