Adul
Elite Member
From EEtimes
SAN JOSE, Calif. ? Intel Corp. today (Oct. 15) described how it could combine four Itanium 2 cores that share a large cache memory to create a processor with more than 1 billion transistors.
In a keynote address here at the Microprocessor Forum, Intel fellow John Crawford said such a design is "imminently doable" from a die-size and manufacturing standpoint and that "we would expect something of this nature coming out."
story
All i can say is damn! 😛
SAN JOSE, Calif. ? Intel Corp. today (Oct. 15) described how it could combine four Itanium 2 cores that share a large cache memory to create a processor with more than 1 billion transistors.
In a keynote address here at the Microprocessor Forum, Intel fellow John Crawford said such a design is "imminently doable" from a die-size and manufacturing standpoint and that "we would expect something of this nature coming out."
story
All i can say is damn! 😛