Intel demos functioning 22nm chips

heyheybooboo

Diamond Member
Jun 29, 2007
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:D

The Consortium demonstrates a 0.1 µm2 sram cell and Intel responds with 0.092 square microns.

Think there was any pressure on the lab for that 0.092 ? LOL

Would this be considered the first 'official' validation of EUV ?


 

Phynaz

Lifer
Mar 13, 2006
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Originally posted by: KingstonU
How far is IBM to 22nm SRAM demonstration?

IBM has demonstrated a 22nm SRAM cell, nothing on the order of a functioning chip.

In typical IBM fashion I expect a "me too" press release soon.
 

Idontcare

Elite Member
Oct 10, 1999
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Originally posted by: heyheybooboo

:D

The Consortium demonstrates a 0.1 µm2 sram cell and Intel responds with 0.092 square microns.

Its possible, but there really is no prize, not even a marketing one, awarded or garnered by having the absolute smallest sram cell.

I would know, for some five or six nodes in a row TI (my employer) was quite loud about the fact they had the smallest sram cells at each node. Guess how much it impacted EPS and marketshare?

These kinds of decisions are usually made by way of avoiding a bruised ego at a tradeshow. The cell size will have been determined by running a gauntlet of FMEA's, per SOP, with risk vs. reward ultimately making the decision for itself.

Originally posted by: heyheybooboo
Would this be considered the first 'official' validation of EUV ?

Nope, its validation that immersion litho combined with computational lithography is viable at 22nm.

No EUV was used in the creation of Intel's 22nm test chip.
 

IntelUser2000

Elite Member
Oct 14, 2003
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Originally posted by: Idontcare

Nope, its validation that immersion litho combined with computational lithography is viable at 22nm.

No EUV was used in the creation of Intel's 22nm test chip.

Interesting thing is that lack of EUV on 22nm might be the reason for delay bringing another Tock after Sandy Bridge aka Haswell and bring another "Bridge" architecture instead. It was on a PCWatch article 2 years ago that were talking about that. So rather than seeing "Haswell" we might see "someBridge" that will be more like transition from Dothan to Yonah, in other words, little more than a tick.
 

Idontcare

Elite Member
Oct 10, 1999
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Originally posted by: IntelUser2000
Originally posted by: Idontcare

Nope, its validation that immersion litho combined with computational lithography is viable at 22nm.

No EUV was used in the creation of Intel's 22nm test chip.

Interesting thing is that lack of EUV on 22nm might be the reason for delay bringing another Tock after Sandy Bridge aka Haswell and bring another "Bridge" architecture instead. It was on a PCWatch article 2 years ago that were talking about that. So rather than seeing "Haswell" we might see "someBridge" that will be more like transition from Dothan to Yonah, in other words, little more than a tick.

Ivybridge is in there between Sandy and Haswell.

But I don't follow. Why would a process tech manufacturing choice cause an architecture delay? The delay of immersion litho to 32nm didn't derail Penryn or Nehalem on 45nm with double-pattern dry litho.
 

alyarb

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Jan 25, 2009
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i don't see EUV being viable til 2016 or later. new lenses, new masks, new photoresists will be necessary or some whole new concept of containing all the damage associated with secondary electron deposition (scattering for about 30nm randomly in the resist) and the environmental requirements for a good exposure are just unreasonable. even the best possible exposure would not be an improvement over what we can do at 193nm with triple and quadruple patterning due to the inherent proximity effect that comes with using this wavelength. there's a lot to get under control with EUV whereas quadruple patterning is viable for at least three more nodes, and seeing as double-patterning has performed so beautifully for intel i am more excited about quadruple+immersion than EUV. multi-patterning will allow them to stay aggressive with tick-tock for another 4 or 5 years without retooling their fabs.

i remember a number of articles popping up after gelsinger was quoted saying "intel sees a clear path to 11nm" and his allusion was a nod to multipatterning, not EUV.