Intel Demonstrates 80-Core, 3GHz, Air Cooled, Teraflop CPU

[anandtechrocks]

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Intel last week demonstrated a working processor with 80 individual processing cores. Each core, or "tile" as Intel calls them, consists of a compute element and a router that allows each tile to connect to its neighbor. The chip can deliver more than 1 trillion floating point operations per second (teraflops), depending on how fast it's running. This is only a research project right now, as there are a lot of challenges involved in making an 80-core chip that's a practical option for PCs and servers.

Intel demonstrated the teraflop research chip in a briefing for reporters last week at a San Francisco hotel. It built a special cooling system for the chip and ran a few applications to demonstrate its performance. Intel had the chip running at around 3GHz during the demonstration, but has gotten it to run faster in its Oregon labs with a water-cooled system, said CTO Justin Rattner.

This is how Intel demonstrated the chip for reporters. Several power supplies were required, and Intel also needed to build a special motherboard. Engineers showed how Intel can obtain different levels of performance by tweaking the chips' clock speed and voltage supply while running an application that solved complex mathematical equations.

-CNet News

Vara says the 80-core chip uses less than 100 watts of energy; a dual-core chip uses 60 to 70 watts and a quad-core uses 105 to 130 watts. Of course the numbers for the 80-core chip could be affected by the fact that it's lacking some functionality, but Rob Enderle, president and principal analyst of the Enderle Group, says it's still a significant accomplishment.

"We're quite literally creating a network mesh to let each little core communicate with the other cores and the rest of the system," says Vara. "The cores will want to know what the other cores will doing so they don't fight."

While it may take five to eight years to come out with a working 80-core chip, Vara says IT managers might start watching for what he calls "different flavors" of quad-core chips. "Maybe you'll have interim chips where they have more complex cores along with simpler cores, too."

-EETimes

Pretty amazing, and at 3GHz it looks like it was cooled with a Scythe heatsink.

Credit goes to gOJDO at XS.org

 

[Alone]

Jesus Christ.

 

[Arcada]

Goodbye cell, and goodbye amd.

 

[MotF Bane]

Intel just built God's computer....

 

[RichUK]

A lot of people miss the point of this project. It?s not about the processing power, it?s about the research into communication between a mass of cores on a single die.

Each of the cores used are very basic in design and are no where near comparable to a Conroe core.

 

[bfdd]

edit

 

[Hyperlite]

ok so obviously, based on the pictures, these cores a very, very small. what process were they built on? how do they compare to a conroe core?

 

[Viditor]

Originally posted by: RichUK
A lot of people miss the point of this project. It?s not about the processing power, it?s about the research into communication between a mass of cores on a single die.

Each of the cores used are very basic in design and are no where near comparable to a Conroe core.

Exactly right Rich...
Let's say that IBM finishes their carbon nanotube process next year (it will actually be closer to 10 years) and is able to produce a chip with 100 cores @100GHz each (remember that carbon nanotubes are up to 10,000 times more conductive than copper and an order of magnitude smaller than the upcoming 45nm)...
The question is, how does that help them? Intel knows that this is the direction we're heading, and they are attempting to begin research on that area...
That's all this chip is...nothing like this chip will ever be in production using current manufacturing techniques.

 

[RichUK]

Originally posted by: bfdd

Originally posted by: RichUK
A lot of people miss the point of this project. It?s not about the processing power, it?s about the research into communication between a mass of cores on a single die.

Each of the cores used are very basic in design and are no where near comparable to a Conroe core.

But they plan on working on that. Of course the cores are simple, but they will eventually be able to make them more sophisticated where we will be using CPUs with 80 cores in them.

Of course they will this much is obvious. Their main focus is designing a communication model to facilitate a high number of concurrent processing cores. ATM there is no suitable technology to handle this amount of on-die communication throughput.

The whole point is to design a model with a large scope in which they can always build upon. Once they have perfected the initial design and it is implemented, adding more processing cores will be like lego. They?ll be able to keep adding as many cores as they like with the only limitation being fabrication processes (45nm, 32nm node etc), and current draw - heat output.

The key point here is networking, and how it will be achieved on this scale.

 

[MotF Bane]

1.25 ns latency between cores. About the only way to possibly improve that is fiber optics. For those who don't know, Conroe is roughly 14 ns latency between cores.
Behold, Laramee. Intel is going to own everyone's computers, probably within the next decade. Motherboards, chipsets, video, processors...
Expect Laramee (perhaps in a reduced version) by 2009, with full Laramee possibly in 2011 or 2012. As for CPU's (Laramee is a GPU, if you haven't been following the news lately), expect to see this stuff showing up in a couple of years, I'd have to bet on it after the Nehalem microarchitecture has been used to full potential. Maybe the next Intel R&D cycle...

 

[Schmeh]

Originally posted by: Hyperlite
ok so obviously, based on the pictures, these cores a very, very small. what process were they built on? how do they compare to a conroe core?

The chip was built using Intel's 65nm process. As for how they compare to a Conroe core, they are alot smaller. The entire chip is 100M transistors and each core is only 3mm^ 2 (This is just an estimate, but I think each Conroe core, without any cache is roughly 35mm^2.)

 

[Furen]

I'm going to go out on a limb and say that I'm not really impressed. The TFlop is not all that impressive considering that pretty much any high-end video card can get half of that, and these are already out. The power draw is impressive but a video card is simply much more useful that some obscure VLIW architecture that is not even compatible with EPIC (not to mention that these have a process advantage over current video cards, as I'm sure they're at least 65nm).

Originally posted by: MotF Bane
1.25 ns latency between cores. About the only way to possibly improve that is fiber optics. For those who don't know, Conroe is roughly 14 ns latency between cores.
Behold, Laramee. Intel is going to own everyone's computers, probably within the next decade. Motherboards, chipsets, video, processors...
Expect Laramee (perhaps in a reduced version) by 2009, with full Laramee possibly in 2011 or 2012. As for CPU's (Laramee is a GPU, if you haven't been following the news lately), expect to see this stuff showing up in a couple of years, I'd have to bet on it after the Nehalem microarchitecture has been used to full potential. Maybe the next Intel R&D cycle...

I think the 1.25ns latency is the router-to-router (or to stacked-DRAM) latency, not the core-to-core latency. Once you measure actual latency you have to hit registers, caches, routers, etc. 1.25ns is something like the equivalent of 4 clock cycles at 3.17GHz, by the way...

Laramee sounds very interesting, though I doubt it'll beat the specialized solutions from AMD/Nvidia. I'm also quite skeptical about Intel's ability to make decent graphics drivers, especially so because it sounds like Laramee will pretty much emulate the unified shader model within the limitations of x86 (unless Intel extends the x86 ISA quite massively).

 

[nyker96]

nuts ... intel will take over this planet with this thing and reign in totalitarian rule ... only kidding, yes I read some articles on it, seems it's an experimental chip to test out core interconnects and low voltage engineering via non-synchronous operations on the cores. pretty cool stuff I think some of that tech will work into some future chips someday.

 

[Fox5]

Originally posted by: Arcada
Goodbye cell, and goodbye amd.

It terms of actual performance, I bet Cell would squash this. There's a performance loss that comes with every core added, and Cell achieves 1TF with far less cores.

And like other people pointed out, as far as coprocessors go, GPUs can achieve comparable results to this.

That said, as just a research project, this is very important. A new architecture and instruction set based on this would be interesting to see.

 

[Schmeh]

Originally posted by: Fox5

Originally posted by: Arcada
Goodbye cell, and goodbye amd.

It terms of actual performance, I bet Cell would squash this. There's a performance loss that comes with every core added, and Cell achieves 1TF with far less cores.

The Cell can't hit 1TFLOP. The Cell's peak is 256GFLOPS at 4Ghz.

 

[aka1nas]

They showed that chip off at the last IDF a few months ago. I think we even had a thread on it here. It's basically a research project for multi-core interconnects. It isn't intended to be even a glimpse of what is coming in the forseable future. We won't be getting 80 general purpose cores in an x86 cpu for a very long time, and more likely never. Amdahl's law kicks in way way before that and it would be tough to use even 16 of those cores effectively.

More likely we will see the GPU/CPU hybrids take off and more exotic cores come into play.

 

[Viditor]

Originally posted by: MotF Bane
1.25 ns latency between cores. About the only way to possibly improve that is fiber optics. For those who don't know, Conroe is roughly 14 ns latency between cores.
Behold, Laramee. Intel is going to own everyone's computers, probably within the next decade. Motherboards, chipsets, video, processors...
Expect Laramee (perhaps in a reduced version) by 2009, with full Laramee possibly in 2011 or 2012. As for CPU's (Laramee is a GPU, if you haven't been following the news lately), expect to see this stuff showing up in a couple of years, I'd have to bet on it after the Nehalem microarchitecture has been used to full potential. Maybe the next Intel R&D cycle...

I think you mean Larrabee...
http://forums.anandtech.com/messageview...atid=28&threadid=2005513&enterthread=y

It's not really a GPU, it's a departure that uses multiple cores for graphics (like Fusion for AMD).
BTW, a better way to impove the speed is using carbon nanotubes. IBM is well on their way with nanotube semiconductors, and Intel has also said that this is the direction they will go down the track.

 

[Idontcare]

Originally posted by: Viditor

Originally posted by: MotF Bane
1.25 ns latency between cores. About the only way to possibly improve that is fiber optics. For those who don't know, Conroe is roughly 14 ns latency between cores.
Behold, Laramee. Intel is going to own everyone's computers, probably within the next decade. Motherboards, chipsets, video, processors...
Expect Laramee (perhaps in a reduced version) by 2009, with full Laramee possibly in 2011 or 2012. As for CPU's (Laramee is a GPU, if you haven't been following the news lately), expect to see this stuff showing up in a couple of years, I'd have to bet on it after the Nehalem microarchitecture has been used to full potential. Maybe the next Intel R&D cycle...

I think you mean Larrabee...
http://forums.anandtech.com/messageview...atid=28&threadid=2005513&enterthread=y

It's not really a GPU, it's a departure that uses multiple cores for graphics (like Fusion for AMD).
BTW, a better way to impove the speed is using carbon nanotubes. IBM is well on their way with nanotube semiconductors, and Intel has also said that this is the direction they will go down the track.

Given how well IBM did with integrating SiLK into their "modern" BEOL, I am none too worried about CNT's disrupting the current ITRS roadmap calling for continued scaling of classic Cu interconnects.

 

[Viditor]

Originally posted by: Idontcare
Given how well IBM did with integrating SiLK into their "modern" BEOL, I am none too worried about CNT's disrupting the current ITRS roadmap calling for continued scaling of classic Cu interconnects.

I don't really see what one has to do with the other, but OK...
However we're talking 10 years out, and the ITRS roadmap (AFAIK) only goes 6 years to 2013...
IBM built their first CNT gate in 2001, so the timeframe seems right to me.

 

[pm]

Originally posted by: Viditor
However we're talking 10 years out, and the ITRS roadmap (AFAIK) only goes 6 years to 2013...

ITRS is supposed to look 15 years ahead. It's their charter. That said, it always amuses me to see all the red "no known solution exists" for everything more than 5 years out, but ITRS does attempt to look ahead ~15 years. The 2006 ITRS roadmap goes to 2020.

For example, picking lithography since it's one of the most interesting to me:
http://www.itrs.net/Links/2006Update/FinalToPost/08_Lithography2006Update.pdf

 

[gOJDO]

Originally posted by: MotF Bane
1.25 ns latency between cores. About the only way to possibly improve that is fiber optics. For those who don't know, Conroe is roughly 14 ns latency between cores.

The cores on C2D are connected via L2 cache. The C2D L2 latency is 14 cycles, not 14ns. Calculated in real-time(ns), depends of the CPU frequency.

 

[Viditor]

Originally posted by: pm

Originally posted by: Viditor
However we're talking 10 years out, and the ITRS roadmap (AFAIK) only goes 6 years to 2013...

ITRS is supposed to look 15 years ahead. It's their charter. That said, it always amuses me to see all the red "no known solution exists" for everything more than 5 years out, but ITRS does attempt to look ahead ~15 years. The 2006 ITRS roadmap goes to 2020.

For example, picking lithography since it's one of the most interesting to me:
http://www.itrs.net/Links/2006Update/FinalToPost/08_Lithography2006Update.pdf

Thanks for the correction pm...
I agree with you on the "red". I suppose that until new tech is actually demonstrated completely (CNT for instance), it makes sense to stick to a roadmap of known and proven processes.

 

[Maximilian]

Well they made this thing that looks like it may have 15 cores, and it wiped out humanity. So who knows what an 80 core cpu could do!

 

[MotF Bane]

If Intel ever retools this thing to run for GPU, it's going to be really good. Lots of small stupid processors... sounds like stream processors... this thing... lots of small stupid processors... only problem is x86 needs an emulator for OpenGL. They need to find a way around that to capitalize on this.

 

[Fox5]

Originally posted by: MotF Bane
If Intel ever retools this thing to run for GPU, it's going to be really good. Lots of small stupid processors... sounds like stream processors... this thing... lots of small stupid processors... only problem is x86 needs an emulator for OpenGL. They need to find a way around that to capitalize on this.

Not quite, it only needs a driver to translate the openGL calls into whatever native assembly language the processor uses.