Discussion Intel current and future Lakes & Rapids thread

[AMDK11]

According to the latest IPC leak, Redwood Cove(Meteor Lake) is +15% vs. Golden Cove and LionCove(Arrow Lake) is +45% vs. Golden Cove.

If that's true, Redwood Cove isn't just Golden Cove+.

Golden Cove+ is in RaptorLake as Raptor Cove.

Edit:
Or maybe the leaks are wrong/lying and Lunar Lake is on x86 Panther Cove?

 

[Exist50]

According to the latest IPC leak, Redwood Cove(Meteor Lake) is +15% vs. Golden Cove and LionCove(Arrow Lake) is +45% vs. Golden Cove.

If that's true, Redwood Cove isn't just Golden Cove+.

Golden Cove+ is in RaptorLake as Raptor Cove.

Both of those numbers are complete nonsense.

 

[Exist50]

It's more fitting that Redwood Cove from Meteor Lake is a new x86 core and ArrowLake is based on RedwoodCove(+?).

Something doesn't add up here.

It's helpful to remember that Raptor Lake was never supposed to exist. Meteor Lake and Redwood Cove were targeted for 2022, and thus RWC as a GLC refresh/enhancement is pretty reasonable. But it seems like everything got pushed back a year, so now we're waiting till 2024 for the next proper uarch advancement.

There really should be no doubt that by Arrow Lake we should see a "new" Intel microarchitecture, at least a 15% IPC gain over golden cove at that point, since Redwood cove should just be GLC+.

I would be careful about making such hard assumptions. But I agree that anything <15% would be disappointing.

Much more interesting (and a lot less leaked about) are the small cores of ARL. We know virtually nothing about those...

I think Lion Cove merits more attention than Skymont for a couple reasons, but Skymont should be quite interesting in its own right. I think that will make for a very fun comparison.

 

[AMDK11]

Since Intel claims that Lunar Lake is a new project from the ground up and it is assumed that it will be based on x86 Lion Cove, what is Lion Cove in ArrowLake?

 

[IntelUser2000]

@Geddagod We cannot say Redwood Cove is Golden Cove+. The changes are very broad, very similar to Haswell. And you know that when they start modifying things like branch prediction and OoOE resources. Raptor Cove in Raptorlake is Golden Cove+ with 1-3% improvement at best. It merits enough for a new name, but not enough to say it's a big haul like Golden Cove was.

Or maybe the leaks are wrong/lying and Lunar Lake is on x86 Panther Cove?

@Exist50 is right. Meteorlake's Redwood Cove core is the Haswell-like gain with about 10% improvement. It improves across the board according to more reliable leakers but it's not a big change.

Lion Cove cores in Arrowlake is the big change with 700+ ROB buffers and 8 wide decode. I don't think they are going 8 wide decode just to get 15%. This should be closer to 25-30%. Lunar Lake apparently also uses Lion Cove cores.

Of course you cannot say Lion Cove is extraordinary, since they miss the big gain with Meteorlake.

MLID and RGT are wrong. RGT is more wrong of course. They both claimed 29% "IPC" gain with Zen 4 and RGT specifically claimed 2.5x the performance for RDNA3.

(Although, for some reason I believe MLID when it comes to the latest Granite Rapids leak. Someone said he has really good sources, he just misinterprets them)

 

[Saylick]

@Geddagod We cannot say Redwood Cove is Golden Cove+. The changes are very broad, very similar to Haswell. And you know that when they start modifying things like branch prediction and OoOE resources. Raptor Cove in Raptorlake is Golden Cove+ with 1-3% improvement at best. It merits enough for a new name, but not enough to say it's a big haul like Golden Cove was.



@Exist50 is right. Meteorlake's Redwood Cove core is the Haswell-like gain with about 10% improvement. It improves across the board according to more reliable leakers but it's not a big change.

Lion Cove cores in Arrowlake is the big change with 700+ ROB buffers and 8 wide decode. I don't think they are going 8 wide decode just to get 15%. This should be closer to 25-30%.

Of course you cannot say Lion Cove is extraordinary, since they miss the big gain with Meteorlake.

IPC gains for Lion Cove probably are more limited by the number of instructions the mop cache can spit out per cycle. GLC had 6-wide decode that was clock gated 80% of the time, but the mop cache could do 8 inst/clk. If they want 25-30% more IPC, my guess is they need a minimum of 10 inst/clk for the mop cache. In reality, likely higher since IPC gains are never proportional to width.

It's not too far off what I expected Zen 5 to be, which was 6-wide decode, 12-wide mop cache dispatch, and 10-wide retire.

 

[IntelUser2000]

IPC gains for Lion Cove probably are more limited by the number of instructions the mop cache can spit out per cycle. GLC had 6-wide decode that was clock gated 80% of the time, but the mop cache could do 8 inst/clk. If they want 25-30% more IPC, my guess is they need a minimum of 10 inst/clk for the mop cache. In reality, likely higher since IPC gains are never proportional to width.

Gains for general purpose processors come from boosting pretty much everything; that's the definition of a CPU. And since uop cache only has a hit rate of 60-70% you cannot rely on that alone. Similar to a trace cache, relying solely on the new feature results in failure.

It's like saying you'll put a 600 hp horsepower on a Camry and you are done. No, the engine is very important but you need to do work everywhere otherwise it's a waste. And a McLaren is useless without being on a Autobahn. So the car work isn't enough.

Boosting decode by 33% isn't enough of course. But the implication that they are doing suggests they are going to do big work. Otherwise why not just get to 7? This isn't your typical 20% gain. But it's not that Lion Cove is special, it's that they have to, since Redwood Cove misses the chance for a big gain, so it has to play catchup.

 

[Exist50]

Since Intel claims that Lunar Lake is a new project from the ground up and it is assumed that it will be based on x86 Lion Cove, what is Lion Cove in ArrowLake?

The same core, just in a different SoC.

@Exist50 is right. Meteorlake's Redwood Cove core is the Haswell-like gain with about 10% improvement. It improves across the board according to more reliable leakers but it's not a big change.

Well hold on there a second. I never speculated anything like Haswell-level changes from Redwood Cove (though you're kinda underselling Haswell). Honestly, I expect very little of it. Maybe 5%-ish?

Lion Cove is more of a mystery to me, but I worry the IPC gains might be overhyped. Using Intel's last couple of uarch changes as a reference, I'd expect something more in the 15-20% range, maybe 25%, but I'm skeptical. I do expect to see much bigger rework vs what Golden Cove or Sunny Cove brought, but how that manifests in PPA numbers, I'm not quite sure.

 

[HurleyBird]

Edit: wrong thread

Well, AMD has long been rumored to substantially increase core counts with Turin, and they probably need to in order to maintain a comfortable lead over Intel in servers. I don't think AMD would plan to stay at 96 cores for serves because it's their #1 priority and they aren't dumb.

I don't see how that happens with 8-Core CCDs unless you can stack them on top of one another.

It might also be possible that there are two different CCDs with different core counts. If AMD does make a 16-core CCD, that would be pretty overkill for a lot of the market.

But RGT is such a garbage tier leaker that it's not even worth putting much speculation into anything he says. Lots of people here hate on MLID, but at least he has some decent sources. RGT doesn't even seem to have that, and his speculation is always much worse. RDNA3 triple RDNA2 performance, anyone?

 

[Exist50]

Well, AMD has long been rumored to substantially increase core counts with Turin, and they probably need to in order to maintain a comfortable lead over Intel in servers. I don't think AMD would plan to stay at 96 cores for serves because it's their #1 priority and they aren't dumb.

I don't see how that happens with 8-Core CCDs unless you can stack them on top of one another.

It might also be possible that there are two different CCDs with different core counts. If AMD does make a 16-core CCD, that would be pretty overkill for a lot of the market.

But RGT is such a garbage tier leaker that it's not even worth putting much speculation into anything he says. Lots of people here hate on MLID, but at least he has some decent sources. RGT doesn't even seem to have that, and his speculation is always much worse. RDNA3 triple RDNA2 performance, anyone?

Meant to comment in the Zen 5 thread?

 

[HurleyBird]

Meant to comment in the Zen 5 thread?

...

yes

 

[poke01]

Lion Cove cores in Arrowlake is the big change with 700+ ROB buffers and 8 wide decode. I don't think they are going 8 wide decode just to get 15%. This should be closer to 25-30%. Lunar Lake apparently also uses Lion Cove cores.

Lion cove will also be used in Lunar Lake which is meant for laptops and Ultrabooks.

If Lunar is Intels M1 moment then Intel will win back Laptops again and gaming handhelds and maybe even be on par in efficiency.
Every thing rides on Arrow Lake and Lunar Lake for the consumer side for Intel. They have to ace these products.

An 8 wide processer allows you to clock low but still be very powerful if the CPU architecture is good. Lunar/LIon will be the most interesting SoCs in a long time.

These are no longer CPUs. Since Meteor Lake I will refer to them as SoCs. Especially Lunar which have a massive iGPU.

 

[DrMrLordX]

gaming handhelds

Intel charges too much to get into consoles.

 

[AMDK11]

It's strange that Intel claims that LunarLake is a completely new project from the ground up. No wonder it uses the same P LionCove cores as ArrowLake since Lunar is a completely new design from the ground up?

Unless Intel also means e Core and general design including 20A/18A process.

And this raises my doubts that Intel claims that only LunarLake is a new project from scratch.

As for RedwoodCove, I dare say that it may not be a rebuild and expansion of GoldenCove's caliber over SunnyCove, but it is already a next-gen x86 core. Probably something like SunnyCove to Skylake.

For me, GoldenCove+ is RaptorCove.

As for Haswell, it's also a new x86 core, although it doesn't provide much of an IPC boost, it's a hefty improvement in the form of FMA3 + AVX2.

For me, a cosmetic for IvyBridge or Broadwell, which introduce, for example, the first hardware pseudorandom generator.

 

[mikk]

Raichu disagrees with 15% more IPC. Frequency over Alder Lake mobile....maybe.

https://twitter.com/x/status/1623739919939272705

 

[Geddagod]

Like @Exist50 said, Intel themselves said RPL was never supposed to exist. RWC should be GLC+ (die shrunk GLC). Single digit IPC gain makes sense. Didn't palm cove (the 10nm die shrink) for cannon lake also bring 5 digit IPC gains?
Over Alder Lake level does not sound that promising tbh. Alder Lake mobile ST clock speed was what, 5Ghz? RPL has a 20% higher boost on desktop. They would have to have much better IPC or better IPC scaling to be comparable performance. Maybe why desktop skus won't launch.
But I'm also guessing there's still time for clocks to improve a bit and clock speeds to be finalized. If testing right now shows it can clock up to ADL mobile levels (ES2 chips I think) then there should still be room for improvement. Some Alder Lake ES2 chips for example only boosted to 4.6 Ghz. But that also depends on where Raichu got the info too, from hearing about ES2 chip tests or just guessing or estimating.

 

[IntelUser2000]

@Exist50 5% is very low, that's almost Penryn level, and Penryn changed barely anything. The leakers were talking about core-wide changes, like branch prediction and OoOE buffers.

 

[Geddagod]

Branch prediction improves nearly every generation doesn't it? And usually branch prediction changes don't add drastically much IPC anyway right?
I don't really recall any leaker talking about increased OOO buffers anywhere though.
The 'wild card' I would argue is how a potentially increased L1 instruction cache as well as potential better Load/Store impact performance. And maybe there will be some touch ups on integer execution based on how that did not shrink very well compared to the rest of the core, and GLC focused heavily on the FP side.

 

[nicalandia]

Geekbench 5 Scores for Xeon W7 2495X. Monolithic 24C/48T CPU

 

[nicalandia]

Xeon W7 2495X vs ThreadRipper 5965WX

Dell Inc. Precision 7865 Tower vs Lenovo 30G9CTO1WW - Geekbench

 

[Markfw]

So, the next generation Intel gets beat by a year old CPU... Pathetic.

 

[nicalandia]

So, the next generation Intel gets beat by a year old CPU... Pathetic.

In MT The Zen2 based Threadripper 3960X does as well..

Lenovo 30G9CTO1WW vs Gigabyte Technology Co., Ltd. TRX40 DESIGNARE - Geekbench

The Base Clocks are just too low on those Xeons to dominate old Threadrippers

 

[Exist50]

@Exist50 5% is very low, that's almost Penryn level, and Penryn changed barely anything.

Yes. Why do you think I'm so pessimistic about Meteor Lake? Can't say I've seen any reputable claims about branch prediction changes or buffer size increases, but I don't really care what the leakers say. Though I'm glad to see Raichu's on the right path.

 

[Exist50]

It's strange that Intel claims that LunarLake is a completely new project from the ground up. No wonder it uses the same P LionCove cores as ArrowLake since Lunar is a completely new design from the ground up?

In all likelihood, it's the same CPU cores (Lion Cove + Skymont), and probably the same process (N3B/N3E?), but the rest of the SoC could be radically different. I'm quite excited to see what comes of Lunar Lake.

 

[uzzi38]

Raichu disagrees with 15% more IPC. Frequency over Alder Lake mobile....maybe.

https://twitter.com/x/status/1623739919939272705

He's right to do so.

Notice the lack of mention of Raptor Lake mobile there btw. It's an important detail.