Discussion Intel current and future Lakes & Rapids thread

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Hulk

Diamond Member
Oct 9, 1999
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Neither of those architectures was designed for 14nm. They need both needed the increase in xtor density and power reduction to effectively replace Skylake. Rocket Lake is so late because the engineers had to figure out how to squeeze a modified *Cove architecture onto 14nm dice.
Yes that is true. But as you wrote they are squeezing Sunny Cove into 14nm so they could have done it 3 years ago if they had a little foresight. Even at the expense of overall clocks they would be in a better place today with a more efficient architecture even if it were at lower clocks.

They have repeated all of the bad decisions they made with the P4 all over again. Now they have to dig out of that hole. Except this time they don't have a "Core" analog in their back pocket, AMD is all over them, and Apple is in the game along with ARM. Now we'll see what Intel is really made of.

On another thought I don't know if AMD's 7nm parts can all core up to a continuous 4+GHz as reported by HWinfo's Average Effective Clock report.

Can someone with an AMD 7nm part turbo up all cores to 90%+ "Total CPU Usage" (HWinfo) for a few minutes and report "Average Effective Clock?" Also from HWinfo.

I'm starting to think the transistor density is too much at 7nm for all core sustained speeds of 4GHz as reported by HWinfo's Average Effective Clock. We've seen Comet Lake load 10 cores to 4950MHz Average Effective Clock so that's why I'm curious. Something is going on here.
 

Hulk

Diamond Member
Oct 9, 1999
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If Intel decided to outsource some production to TMSC would they be able to "push" AMD back in the line due to their size and financial resources?
 

DrMrLordX

Lifer
Apr 27, 2000
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If Intel decided to outsource some production to TMSC would they be able to "push" AMD back in the line due to their size and financial resources?
No. TSMC's credibility would be permanently shot, and TSMC has commented publicly that they won't take on the bulk of Intel's production runs anyway.
 
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jpiniero

Lifer
Oct 1, 2010
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Getting Intel to drop off the leading node would be huge for TSMC though. So it's worth it for them to give them some business. Worst case they end up just raising wafer prices.
 

shady28

Platinum Member
Apr 11, 2004
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Lots of indicators that TSMC is already raising prices, many leaks about that happening already and not just at TSMC - GloFlo and other foundries as well.

Also after two decades of falling per-chip costs from TSMC as the nodes got smaller and smaller, the per-chip cost of 5nm vs 7nm was an inflection point. Cost per chip went up, only a little, but it reversed the trend.


 

LightningZ71

Golden Member
Mar 10, 2017
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This is to be expected when competition diminishes in an industry. We have three players left with leading edge nodes: TSMC, Samsung, and Intel. At the moment, TSMC has volume in the industry's best node (N5), Intel has low volume with a node that could be considered second best (10sf), and Samsung has volume with their 8nm node and is risk with their next (from memory, could be wrong) node. GloFo has bailed on anything past 12LP+/22FDX/12FDX. Other foundaries are way way behind. Couple all that with a market demand that is outstripping supply, and how very difficult it is to move from one foundary to another, and I'm shocked that prices haven't skyrocketed.

If the trend continues, second tier chips will make sense on trailing nodes over doing smaller dies on new nodes. So, for example, instead of making the 3300x/3100 on N7 with die recovery, they could have done an APU on GloFo 12LP+ as a sort of "half Renoir", 4 cores, 4MB L3, Zen2, VEGA4, etc. It would have been similar in size to Raven Ridge, but on a now cheaper node. AMD is showing that they have no problems with using different core generations in a CPU family generation with the upcoming 5000 series APUs. They have already shown that they will use different nodes in a number generation with the 3000 family APUs on 12LP, and the desktop products on a mixed node package. AMD would have also been much better able to supply the market with product with more sourcing from GloFo, and a half Renoir should be a better performer than the existing 3000 series APUs, save for gpu performance, though that wouldn't be as big of a deal in that segment.

As for Intel, and the point of this thread, I don't see them ever sourcing any of their Lakes products from someone else. It's still designed based on their old strategy of marrying a design to an in house node as far as I've ever read.
 

Ajay

Lifer
Jan 8, 2001
11,576
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Yes that is true. But as you wrote they are squeezing Sunny Cove into 14nm so they could have done it 3 years ago if they had a little foresight. Even at the expense of overall clocks they would be in a better place today with a more efficient architecture even if it were at lower clocks.
Intel didn't have the foresight to transition a 'Cove' architecture to 14nm till it was too late. And even then, there are only marginal gains to be had in some workloads. Intel got way to aggressive with it's 10nm process, to really 'sink' the competition, and it bit them in the arse. Now, they'll be lucky if they can catch back up in 5 years.
 

Dave2150

Senior member
Jan 20, 2015
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+10% IPC and -2 cores doesn't look like it's going to make the product that much better than just Comet Lake-S, especially if Intel is forced to massively discount everything.
It will easily retake the performance crown in gaming, which is a very important area.

Quite laughable that AMD will have only managed to 'claim' the gaming performance crown for a couple months with a paper lunch of Ryzen 5000. Still can't any in stock, as AMD have no fabs and have to beg TSMC for scraps. Considering the massive blunder that Intel went through with 10nm and their failure to back port Rocket Lake to 14nm sooner, AMD should have taken much greater advantage IMO.
 
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Bam360

Member
Jan 10, 2019
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There is one thing that I keep hearing, which is Intel being doomed just because of 10nm failure.
I disagree, Intel's biggest problem is refreshing the same architecture for 5 years old. Why are people talking about how bad of an idea is backporting to 14nm? have we forgot about Zen3? Cortex A77? Maxwell?
You can design an improved architecture on the same node and get decent to good gains, you just need some compromises, especially die size. If Rocket Lake sucks, it's not because it is on 14nm, it is because Cypress Cove is a mediocre architecture, that's it. If it was good, then efficiency would be good.
 

Mopetar

Diamond Member
Jan 31, 2011
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Lots of indicators that TSMC is already raising prices, many leaks about that happening already and not just at TSMC - GloFlo and other foundries as well.

Also after two decades of falling per-chip costs from TSMC as the nodes got smaller and smaller, the per-chip cost of 5nm vs 7nm was an inflection point. Cost per chip went up, only a little, but it reversed the trend.


It's necessary if we're going to get out of the current supply crunch. TSMC having extra money to invest in expanding production capacity is good in the long run because we're only ever going to increase the number of chips we stick in things.
 

shady28

Platinum Member
Apr 11, 2004
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There is one thing that I keep hearing, which is Intel being doomed just because of 10nm failure.
I disagree, Intel's biggest problem is refreshing the same architecture for 5 years old. Why are people talking about how bad of an idea is backporting to 14nm? have we forgot about Zen3? Cortex A77? Maxwell?
You can design an improved architecture on the same node and get decent to good gains, you just need some compromises, especially die size. If Rocket Lake sucks, it's not because it is on 14nm, it is because Cypress Cove is a mediocre architecture, that's it. If it was good, then efficiency would be good.
I agree with you're saying, however -

Intel made some significant improvements 14nm density since Skylake.

The foundries would have called 14nm++ / +++ a new node, and in fact they did just that if you look at their 14/16 12 and 10nm parts.

So it's not accurate to say Intel has not been advancing their node tech :

Skylake = 95W TDP i7-6700K
4C/8T
24EU iGPU
8MB cache
122mm die size

Coffee Lake = 95W TDP i9=9900K <- same TDP at stock
8C/16T <-double
24EU iGPU < - same, but higher freq and lower power, more codecs supported
16MB L3 cache <- double
180mm die size <- +47% larger die for 2x more cores and cache

This would imply density has gone up about 30-35%, and that power efficiency for same components went up by a similar margin.

For example the 10100, which has higher frequencies than the 6700K and a larger iGPU, has a TDP of 65W vs 95W for Skylake.

But the architecture comment is spot on. Intel should have released Rocket Lake this past summer.
 

firewolfsm

Golden Member
Oct 16, 2005
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Density did NOT go up for the 14nm pluses. They actually relaxed density slightly to boost clock speeds. The reason for the good scaling is the parts of the die which didn't double, such as memory controller, gpu, etc.
 

shady28

Platinum Member
Apr 11, 2004
2,520
397
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Density did NOT go up for the 14nm pluses. They actually relaxed density slightly to boost clock speeds. The reason for the good scaling is the parts of the die which didn't double, such as memory controller, gpu, etc.
The numbers would seem to contradict your statement.
 

Spartak

Senior member
Jul 4, 2015
353
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The numbers would seem to contradict your statement.
firewolfsm is correct. You don't understand where the improvement comes from and assume it's from increased density. the 14nm+ and beyond density is lower then the original 14nm and has remained such. The improved power usage is mostly from reduced leakage and lower voltages and to a lesser extent the fact that not every part scales along with core count.
 

shady28

Platinum Member
Apr 11, 2004
2,520
397
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firewolfsm is correct. You don't understand where the improvement comes from and assume it's from increased density. the 14nm+ and beyond density is lower then the original 14nm and has remained such. The improved power usage is mostly from reduced leakage and lower voltages and to a lesser extent the fact that not every part scales along with core count.
Regardless of how, they are getting twice as much on a die that is only 47..5% larger.

From a yield perspective, that die size is what matters because it means they'll get more transistors / chips of the same core count from a wafer.

Try doing a comparison of the die size of a 10100 (with iGPU) vs a 3300X (no iGPU) 7nm part. The iGPU on a 10100 is about 25-30% of the die size.

And then there's this :

 

Spartak

Senior member
Jul 4, 2015
353
266
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As for Intel, and the point of this thread, I don't see them ever sourcing any of their Lakes products from someone else. It's still designed based on their old strategy of marrying a design to an in house node as far as I've ever read.
Then you haven't read anything about Intel in the past two years. With the announcement of the Cove architectures they explicitly mentioned they decoupled architecture form process node and the internal revolution it caused. Rocket Lake is a first example but Alder Lake and it's variants might be a second with desktop parts on 10SF and mobile versions that launch a bit later likely on 10ESF.

They are now indeed looking very hard at TSMC for future Lake products, decision will be made in 21Q1 but all signals point to go at this point.
 

Spartak

Senior member
Jul 4, 2015
353
266
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Regardless of how, they are getting twice as much on a die that is only 47..5% larger.

From a yield perspective, that die size is what matters because it means they'll get more transistors / chips of the same core count from a wafer.

Try doing a comparison of the die size of a 10100 (with iGPU) vs a 3300X (no iGPU) 7nm part. The iGPU on a 10100 is about 25-30% of the die size.

And then there's this :

Again, it's not twice as much when you look at the full transistor count including uncore. Also: various parts have various density and transistor size does not 1:1 translate to higher density. This is something many people have trouble to wrap their head round but transistors beyond their feature size are also spaced from each other, a bit like how molecules in a fluid form are more dense then in gas form. The feature size (molecule size) is the same for both yet a gas included much less molecules then a fluid per cm3. Likewise logic density is much less dense compared to f.i. cache density yet both have the same transistor feature size.
 

Bam360

Member
Jan 10, 2019
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iGPU takes a huge part of the die, and it remained more or less intact. So when Intel went from 4 to 8 core, it is evident that die size didn't double, because iGPU is still the same.
Density didn't improve, what improved is performance characteristics, ie, the classic "X% faster at same power" or "Y% less power at same performance level".
So 14 to 14+ would be kind of like TSMC N7 to N7P.
 
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dr1337

Member
May 25, 2020
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Regardless of how, they are getting twice as much on a die that is only 47..5% larger.

From a yield perspective, that die size is what matters because it means they'll get more transistors / chips of the same core count from a wafer.

Try doing a comparison of the die size of a 10100 (with iGPU) vs a 3300X (no iGPU) 7nm part. The iGPU on a 10100 is about 25-30% of the die size.

And then there's this :

The thing I hated about this video is that der8auer went through all this trouble and yet only took images of cache... And while he mentions that cache is more uniform in its design and more comparable across foundries and nodes, its also kinda silly to only focus on cache because other logic does shrink a lot more than just cache. Its still interesting to see how cache density compares across intel 14nm++++ and tsmc/amd 7nm, but its really far from the whole story.
 

Exist50

Golden Member
Aug 18, 2016
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I agree with you're saying, however -

Intel made some significant improvements 14nm density since Skylake.

The foundries would have called 14nm++ / +++ a new node, and in fact they did just that if you look at their 14/16 12 and 10nm parts.

So it's not accurate to say Intel has not been advancing their node tech :

Skylake = 95W TDP i7-6700K
4C/8T
24EU iGPU
8MB cache
122mm die size

Coffee Lake = 95W TDP i9=9900K <- same TDP at stock
8C/16T <-double
24EU iGPU < - same, but higher freq and lower power, more codecs supported
16MB L3 cache <- double
180mm die size <- +47% larger die for 2x more cores and cache

This would imply density has gone up about 30-35%, and that power efficiency for same components went up by a similar margin.

For example the 10100, which has higher frequencies than the 6700K and a larger iGPU, has a TDP of 65W vs 95W for Skylake.

But the architecture comment is spot on. Intel should have released Rocket Lake this past summer.
Density hasn't improved. The cores + L3 just aren't 100% of the silicon.
 
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Dave2150

Senior member
Jan 20, 2015
639
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Regardless of how, they are getting twice as much on a die that is only 47..5% larger.

From a yield perspective, that die size is what matters because it means they'll get more transistors / chips of the same core count from a wafer.

Try doing a comparison of the die size of a 10100 (with iGPU) vs a 3300X (no iGPU) 7nm part. The iGPU on a 10100 is about 25-30% of the die size.

And then there's this :

You're completely wrong, and should stop posting incorrect information. Intel's 14nm is still 14nm, there have been no density improvements.
 

DrMrLordX

Lifer
Apr 27, 2000
20,281
9,334
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Intel didn't have the foresight to transition a 'Cove' architecture to 14nm till it was too late. And even then, there are only marginal gains to be had in some workloads. Intel got way to aggressive with it's 10nm process, to really 'sink' the competition, and it bit them in the arse. Now, they'll be lucky if they can catch back up in 5 years.
If only they had listened to Francois. Allegedly he was one of the first to propose something like Rocket Lake. Allegedly.

It will easily retake the performance crown in gaming, which is a very important area.
Based on what?
 

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