Intel Cannonlake, Ice Lake, Tiger Lake & Sapphire rapid thread

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DrMrLordX

Lifer
Apr 27, 2000
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Technically Intel has been producing 7nm consumer CPUs since 2017. You couldn't realistically buy one though, and if you could, you'd regret it.
 

IntelUser2000

Elite Member
Oct 14, 2003
6,878
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6GHz for 5nm, maybe?
That's almost certainly never happening. At 4.5GHz-plus frequencies CPUs just run into serious thermal issues that can't be solved using air cooling. That's why both AMD and Intel's high clocking CPUs are using nearly 200W to do so. At 6GHz it might be 500-700W.

And we only got to 200W because we have 2.5lbs air coolers and more mainstream water cooling.

We have ultrabooks that weigh 2lbs, and we have CPU coolers that weigh more than that. :D

I don't have a problem with Intel's progress with TGL, at least as far as we know based on base clocks & those inventory stocks which are presumably twice the volume ICL had prior to launch.
I don't believe the top clocks will impress. However, overall it looks pretty nice. Tigerlake has 10% higher clocks while its IccMax has been reduced by 15-20%.

I felt that with post Kabylake CPUs, they were really pushing the limits of 14nm. Tigerlake's IccMax figures are much more sane.
 
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Cardyak

Member
Sep 12, 2018
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That's almost certainly never happening. At 4.5GHz-plus frequencies CPUs just run into serious thermal issues that can't be solved using air cooling. That's why both AMD and Intel's high clocking CPUs are using nearly 200W to do so. At 6GHz it might be 500-700W.
In the short term I think you're correct. But in the long term there are many many innovations that can be implemented to mitigate heat issues. More exotic materials can be explored, and Jim Keller himself has said that Intel is investing huge amounts of research into this field, and that we'll see "interesting" things over the next decade.
 
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mikk

Platinum Member
May 15, 2012
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A new listing have appeared in the graphics driver: it's Meteor Lake.

LAKEFIELD_R
TIGERLAKE_LP
RYEFIELD
ROCKETLAKE
ALDERLAKE_S
ALDERLAKE_P
TIGERLAKE_HP
METEORLAKE

I'm not sure where all this clock speed pessimism is coming from, and I think Tiger Lake should help align expectations accordingly. My personal stake in the ground is 4.8GHz (ignoring TVB) if anyone wants a juicy quote for their signature.

No, I think the question isn't whether they'll get back to 5GHz, but rather if and when they'll go beyond that. 6GHz for 5nm, maybe?

Do you refer to Singlethread of multithread (sustained clock speed). As for singlethread something in the 4.5 Ghz-4.7 Ghz range might not be too far-fetched for the upper Tigerlake-U models. We have had A0/B0 stepping models with 2.7/4.3 Ghz while the recently leaked QS models have a higher base of 2.8 Ghz and 3.0 Ghz (the faster i7 ones), I have to assume the singlethread clock speed has been improved as well. As for multithread we should wait, this can vary from device to device.
 
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uzzi38

Senior member
Oct 16, 2019
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A new listing have appeared in the graphics driver: it's Meteor Lake.
Uh, if memory serves me correctly it used to say "Future" or something like that instead of Meteor Lake previously, didn't it?

Any mention on if it's Gen12 or Gen13 graphics?
 
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Dayman1225

Senior member
Aug 14, 2017
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Uh, if memory serves me correctly it used to say "Future" or something like that instead of Meteor Lake previously, didn't it?

Any mention on if it's Gen12 or Gen13 graphics?
For what should be a H2'22 part, it better be Gen13
 
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Dayman1225

Senior member
Aug 14, 2017
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I am aware that Fab 42 in Chandler AZ will be ramping 7 nm moving forward, but do you know the other fabs that will have 7nm production going on?
The official comment is only about Fab42 but I imagine they will upgrade the fab in Ireland or Israel to 7nm.
 

lobz

Golden Member
Feb 10, 2017
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I believe he's simply saying that because 7nm is just around the corner, 10nm's impact window is closing so it won't be as productive as their previous nodes. This makes a lot of sense, but I expect 10nm to continue improving, ala 14nm, and help carry Intel's future chip loads.
Even though 10nm has proven to be such a pain for Intel, I'm happy they didn't scrap it because I think it's the node that's positioned to combine the highest density/frequency, since it's expected that 7nm and below should not clock as high due to overall heat and hotspots arising from the higher densities. I think the positive news on 10nm in recent weeks is going to continue as Intel continues to tweak the node.
Just around the corner - that's exactly where I'm shaking my head reading this. More than 2 years in any consumer product is really not just around the corner, otherwise Zen 4 is also just around the corner.
 

Ajay

Diamond Member
Jan 8, 2001
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The official comment is only about Fab42 but I imagine they will upgrade the fab in Ireland or Israel to 7nm.
If 7nm is going to fill out the entire stack, doesn't that mean 6-7 fabs? And, in pretty short order too.
 

IntelUser2000

Elite Member
Oct 14, 2003
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As for singlethread something in the 4.5 Ghz-4.7 Ghz range might not be too far-fetched for the upper Tigerlake-U models.
I'm leaning towards 4.3GHz being top clock for the U. Whatever it can achieve at base clocks change totally when looking at peak clocks, when looking at 4-plus GHz frequencies.*

I expect similar to Kabylake. A 28W model has 3.5GHz base clocks and 4GHz Turbo clocks. We could see 3.3-3.5GHz for base but I expect peak to remain similar at 4.3GHz(maybe 4.2GHz for 15W).

What's more important is that its IccMax came down while achieving higher frequencies. So they have more control over the chip, and I bet its V/F curves are less steep, alowing higher end of the frequency to use less power compared to Icelake. Icelake's 10nm seems great at low frequencies. But that quickly reverses at higher speeds.

*At such frequencies its almost nothing to do with capabilities of the process and design and almost entirely up to maturity, tweaking, and jacking up thermals. Had Intel ended 14nm reign with Skylake I doubt we'd have seen above 4.5GHz.


@Cardyak Further addressing your points, recently engineers(such as from AMD) said expect future processes to decrease in clocks.
 

Exist50

Member
Aug 18, 2016
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Do you refer to Singlethread of multithread (sustained clock speed). As for singlethread something in the 4.5 Ghz-4.7 Ghz range might not be too far-fetched for the upper Tigerlake-U models. We have had A0/B0 stepping models with 2.7/4.3 Ghz while the recently leaked QS models have a higher base of 2.8 Ghz and 3.0 Ghz (the faster i7 ones), I have to assume the singlethread clock speed has been improved as well. As for multithread we should wait, this can vary from device to device.
I was referring to single thread boost frequency, of course. I expect to be called an optimist for saying even that much. 4.8GHz multicore would be delusional. But we should see soon enough.

I expect similar to Kabylake. A 28W model has 3.5GHz base clocks and 4GHz Turbo clocks.
I don't see that happening for several reasons. They haven't had a gap that small since they started inflating PL2. With increased competitive pressure, they have no reason to substantially reverse that trend now. Hell, if Willow Cove clocks that poorly, then AMD will undoubtably have the single thread performance crown. Even more generally speaking, such low clocks would mean a continuation of the outright pathetic performance scaling we've seen over the last half a decade or so.

In any case, I'm confident that things won't be that bad. With luck, we'll look back upon these last few years in disgust, as the nadir of single core performance growth.
 
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beginner99

Diamond Member
Jun 2, 2009
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If 7nm is going to fill out the entire stack, doesn't that mean 6-7 fabs? And, in pretty short order too.
If...

And the answer is pretty sure no. They can use 10nm for desktop for another couple years. I'm going to suggest that desktop is now the last class citizen. Mobile and server gets new process first, desktop lags behind. And for mobile it will also only be part of the lineup. Most will go to servers (CPU and accelerators).
 

lobz

Golden Member
Feb 10, 2017
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More like it's actually on-time as opposed to Come-ith Late.
In that case it'd be all the more surprising if Rocket Lake would end up even remotely on-time. I know that the board and the investors are buying the very same obvious crap since 2017's Cannon Lake from quarter to quarter, but why should we?
 

Dayman1225

Senior member
Aug 14, 2017
988
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If 7nm is going to fill out the entire stack, doesn't that mean 6-7 fabs? And, in pretty short order too.
No. As of Q4'18 (Last time Intel updated this slide) Intel "only" had 3 14nm Fabs online, though I imagine pretty large fabs at that and since then they have expanded the capacity of those fabs.

1588085429378.png
 

Cardyak

Member
Sep 12, 2018
27
19
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In the realm of crazyness. Got this dropped...

Project << Starwars Moon? >>
ISA << IA-FUTURE >>
Node << Intel 5nm >>

From the later cove core to the above is the equivalent aggregate perf/watt enhancement of P5 on 0.8 μm to the later cove core. <== Other than the vague info.

5nm development has started.
5nm memories will be next.
5nm logic will be after.
5nm microarchitectures+other ip after that.
w/ the launch being a short time from now in a foundry very, very near....

Regardless, I'm going to distance myself even further from these "intel" people.
Almost certain I'm taking the bait here, but this is an interesting post regardless.

Okay so first of all - This sounds far to good to be true. You mean the gap in perf/watt on the latest cove compared to this new super-secret architecture is better than all of the perf/watt increases from the latest Cove to the P5? First of all can you clarify what the phrase "Later cove core" means? Are we referring to Sunny, Willow, Golden, or even something later?

Surely the designs for Intel's 5nm architectures are way to far out to really offer any granular detail on performance metrics?
 

NostaSeronx

Diamond Member
Sep 18, 2011
3,031
612
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Okay so first of all - This sounds far to good to be true. You mean the gap in perf/watt on the latest cove compared to this new super-secret architecture is better than all of the perf/watt increases from the latest Cove to the P5? First of all can you clarify what the phrase "Later cove core" means? Are we referring to Sunny, Willow, Golden, or even something later?
Where I found it didn't specify what Cove core it was talking about on the roadmap. Other than it was later rather than earlier, since we only know about Goldencove, I originally had Goldencove in the spot.
Palmcove (10nm) -> Sunnycove (10nm+) -> Willowcove(10nm++) -> Goldencove (10nm+++) -> --- Cove (7nm) -> --- Cove (7nm+) --> "Deadsun 1" (7nm++) -> "Deadsun 2" (5nm)

Most of it was about the first 5nm CPU core only though. DS1 will go half-way(probaby, the 7nm up-port wasn't mentioned at all) and DS2 will go all the way.
Surely the designs for Intel's 5nm architectures are way to far out to really offer any granular detail on performance metrics?
Anything canned between May 3, 2013 to June 21, 2018 might be back on the table. Also, compared to previous architectures this one has the most funding comparatively. The architecture is being worked on by all teams with C2DG/Haifa team being in command seat from the get-go. Rather, than build it at Folsom or Oregon and have Haifa fix it if it isn't feasible for production. It is particularly an all-in architecture, much like how AMD went with Zen.

I'm currently watching for any updates with;
BiTS team (known work on IA32 EL/Houdini/IA32 and Intel 64 DBT instructions)
DRVFS team (known work on SoftMachines)
EPIC team (known work on EPIC ISA and EPIC instruction set extentsion to IA32/Intel 64)

For the potential perf/watt improvements and IA-FUTURE.

The metrics are probably from planning and simulations with the 7nm risk production. With the increased margin of hitting the end goal with the 5nm node.

DBT unit shouldn't translate between ARM instruction to x86 instruction. (Specifically, the DBT unit is after the decoder not before it) Rather, converts decoded R/M/I operand/addresses from physical(ex. finite(R0-R15)) to virtual(ex. infinite(vR0-vR∞)). As well as some other features allowing for thread rotations, as well as automatic fencing. (Which is used in conjuction with the consistency/security manager around the retire/scheduler)
 
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