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Intel Cannonlake, Ice Lake, Tiger Lake & Sapphire rapid thread

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OriAr

Member
Feb 1, 2019
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If Alder Lake S is 2021 does it mean that there'll be two desktop launches in 2020 - Comet Lake S and Rocket Lake?

I find that hard to believe.
Rocket Lake is either 2020 Q4 or 2021 Q1, allegedly it might be a CES launch. Won't be surprised at all if CML is a short generation.
 
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jpiniero

Diamond Member
Oct 1, 2010
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It'd be a lot harder to hide meme volume on the desktop socket.

If Alder Lake S is 2021 does it mean that there'll be two desktop launches in 2020 - Comet Lake S and Rocket Lake?
The shortage makes it pretty unlikely at this point.
 

mikk

Platinum Member
May 15, 2012
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Well, if they are going to backport Willow, may as well backport Golden too. Talk about toasty..
I guess this is your last hope. From 10nm TGL NUC "this is your 10nm desktop" to Alder Lake-S on 14nm, your last hope. You will be wrong as usual.
 

jpiniero

Diamond Member
Oct 1, 2010
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I guess this is your last hope. From 10nm TGL NUC "this is your 10nm desktop" to Alder Lake-S on 14nm, your last hope. You will be wrong as usual.
Doesn't have to be 14 nm. They could come to their senses and port to a TSMC node, or perhaps since it's a 2022 product they could delay it long enough to use 7 nm.

For Intel to actually do a real desktop product on 10 nm, yields would have to be legitimately decent and not just hiding behind last gen products. Is 2 years enough time for that to happen?
 

uzzi38

Senior member
Oct 16, 2019
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Doesn't have to be 14 nm. They could come to their senses and port to a TSMC node, or perhaps since it's a 2022 product they could delay it long enough to use 7 nm.

For Intel to actually do a real desktop product on 10 nm, yields would have to be legitimately decent and not just hiding behind last gen products. Is 2 years enough time for that to happen?
Alder Lake is just 10nm's Broadwell, but the chips have reasonable perf.

Shame it lacks core count and power efficiency, but you can't win them all with a chip that was removed from and then re-added to roadmaps on a still non-functional node just to ensure said node didn't look like an entire disaster.

Another shame that Zen 4 is the same year too, and timeframes are in line with one another to boot.

But for those that want an actual improvement in their CPUs without accepting the Su, then you guys better thank AMD they freaked out Intel so hard they're willingly going to take significant losses just to try and appear to still be in the game.
 
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vstar

Junior Member
May 8, 2019
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Alder Lake is just 10nm's Broadwell, but the chips have reasonable perf.

Shame it lacks core count and power efficiency, but you can't win them all with a chip that was removed from and then re-added to roadmaps on a still non-functional node just to ensure said node didn't look like an entire disaster.

Another shame that Zen 4 is the same year too, and timeframes are in line with one another to boot.

But for those that want an actual improvement in their CPUs without accepting the Su, then you guys better thank AMD they freaked out Intel so hard they're willingly going to take significant losses just to try and appear to still be in the game.
Do we know anything about the core counts for ADL-S? I'm curious.
 

vstar

Junior Member
May 8, 2019
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8 tops would be a good guess.
I would have thought they'd push core counts further given that ADL-S will be on the LGA1700 socket, but I guess it's a waiting game to find out the exact specs. 12+ cores on the i9 client SKU would be nice!
 

Exist50

Member
Aug 18, 2016
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🙄 So much drama over yields. Like, no one can believe the situation is good, but being unable to make an 8 core in 2021? EMIBing quad cores? Come on now, that's all rather silly. Heck, they probably wouldn't even have to increase the die space a ton if they cut back on the GPU in Tiger Lake.

As for Alder Lake, I'm not sure why the idea of a desktop chip would be so laughable. Seems to make sense for them to shore up their biggest weakness vs AMD.
 
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OriAr

Member
Feb 1, 2019
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Do we know anything about the core counts for ADL-S? I'm curious.
If I had to bet, I think we'll see 8 cores in a single die, with +10 cores being achieved through EMIB, maybe a 16 core i9 with 2 octa core dies being interconnected by EMIB?
The changed package dimensions for ADL-S makes me think that this is when we see EMIB make its way to desktop.
 
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jpiniero

Diamond Member
Oct 1, 2010
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I would have thought they'd push core counts further given that ADL-S will be on the LGA1700 socket, but I guess it's a waiting game to find out the exact specs. 12+ cores on the i9 client SKU would be nice!
Have a feeling it's going to be basically the U die in socketed form. So the extra pins are for the additional IO.
 

jpiniero

Diamond Member
Oct 1, 2010
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You shouldn't expect that.
Well, it seems they are getting rid of the H lineup in favor of higher wattage U parts. I think they are calling it P with Alder Lake. I don't know how much R&D effort they want to put in something that would be S specific.
 

coercitiv

Diamond Member
Jan 24, 2014
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Then explain why Tiger Lake-U is another 4c part.
Because they couldn't fit more into the transistor budget? Remember Tiger Lake-U and Renoir have roughly the same die size, so a direct correlation between core count and yields is not straightforward in this case.

Untitled-1.png
 

RetroZombie

Senior member
Nov 5, 2019
292
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Then explain why Tiger Lake-U is another 4c part.
The plan was easy, forever:
- 2c in Mobile​
- 4c in Desktop​
- 10c in HEDT​
- 12c in Servers only by doing you a big favor read $$$$$​
- 20c Datacenter huge favor, very limited just for some people probably sold in auditions starting at 20.000$​
 
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SAAA

Senior member
May 14, 2014
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Well it wasn't like that honestly, consider I saw charts in 2013 or so that pointed at 6 (if not 8?) cores cannonlake mainstream, graphics should have topped at 96EUs with gen-10.
It would have made sense then if you think how much denser than 14nm the 10 nm process was in the first place, literally two nodes at once.

Look at this:
-Broadwell 14 nm quad core, 48 EUs, 182 mm^2 die size
-Tiger lake 10 nm quad core, 96 EUs, 144 mm^2 die size

You have faster, larger cores (with AV512 and possibly 30% better IPC) plus twice the EUs (each one better too) in a smaller chip.

Also:
-Broadwell with 24 EU sits at 82 mm^2, same cores with 48 EUs is 133 mm^2.
50 mm^2 for 24 EUs more.
-Icelake with 64 EUs is 122 mm^2, similar Tiger lake cpu has 96 EUs in just 146 mm^2.
Hence 24 mm^2 for 32 EUs more, they are Gen 12 vs 11 too.

The density increase is sizable here, 2.77x better in the real world products, if 10 nm worked sooner we would be sitting on really great CPUs.
If 7 nm is anywhere near working and has another 2x by 2022 at best that's some revolution going to happen, along with new architectures, finally.
 

uzzi38

Senior member
Oct 16, 2019
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Because the iGPU is pretty damn big and they had a transistor budget? An 8 core die would have the iGPU gutted, chances are it won't be bigger at all.
It's not so much the iGPU as it is the CPU cores. The iGPU is about 3/4s the size of the CPU cores in Tiger Lake, each core is just bloody phat.

Even trimming the iGPU alone wouldn't allow them to maintain the same die size, they'd probably have to also trim off the integrated Thunderbolt 4 and possibly the IPU as well if they wanted to skeep to the same 150-ish mm^2.
 

DrMrLordX

Lifer
Apr 27, 2000
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Because they couldn't fit more into the transistor budget?
They could with a smaller iGPU (or no iGPU at all). I seriously doubt that Intel has foregone CPUs with more than 4c just because they want that huge iGPU on everything they produce.

The plan was easy, forever:
- 2c in Mobile​
- 4c in Desktop​
- 10c in HEDT​
Intel already broke that with the 8700k years ago.
 

OriAr

Member
Feb 1, 2019
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They could with a smaller iGPU (or no iGPU at all). I seriously doubt that Intel has foregone CPUs with more than 4c just because they want that huge iGPU on everything they produce.
Yeah, but for TGL-U Intel decided they prioritize the iGPU over core count.
For ADL-S they could decide to gut the iGPU for core count, or even connect the iGPU through EMIB with an 8 core die. The truth is that an 8 core die with a gutted iGPU wouldn't be much bigger (And probably not bigger at all) than TGL-U's die. If Intel decide to take the iGPU off the die and connect it with EMIB than you are saving even more silicon.
Intel don't want to go over 150mm^2 for consumer parts, and up until the 9900K, they never really have done so.
 

RetroZombie

Senior member
Nov 5, 2019
292
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Intel already broke that with the 8700k years ago.
Sorry but they didn't, all their new 10nm designs are dual or quad core. If they really wanted to broke from that or planed to do it, they would already have released or announced something...
Did you ever saw something even in some old road map from them with more than dual/quad?
 

jpiniero

Diamond Member
Oct 1, 2010
7,453
949
126
If Rocket Lake is using chiplets, it would easy to assume that Alder will too. And if the chiplets are compatible with each other... that would make it feasible to mix in Rocket Lake's CPU and GPU chiplets with Alder Lake to hide 10 nm, even if they don't bother to port Golden Cove to an functional node.

Did you ever saw something even in some old road map from them with more than dual/quad?
There was a leak that Cannonlake was meant to go up to 8 cores. Whether mobile would have gone that high with U is another story.
 

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