Intel Building new fab

[Phynaz]

Hey Mister, got $5B you can spare?

Intel Corp. used President Obama's visit to unveil plans to build a $5 billion chip factory in Arizona and hire 4,000 additional workers, moves that dovetail with the administration's job-creation agenda.

The announcement, made by Intel Chief Executive Paul Otellini as the president toured Intel's operations in Oregon, is the latest in a series of steps by the Silicon Valley giant to boost manufacturing capacity and shrink transistors to boost chip performance. Earlier Friday, the White House said Mr. Otellini will join the President's Council on Jobs and Competitiveness.

Intel had previously signaled a new factory was needed. In mid-January, following the release of its fourth-quarter earnings, the company boosted its capital spending forecast for 2011 to $9 billion from $5.2 billion in 2010.

The company said its future factory, in Chandler, Ariz., will be the most-advanced high-volume semiconductor manufacturing facility in the world, and will result in thousands of construction and permanent manufacturing jobs in Arizona. The city is already home to one of the company's production sites, though Intel also has high-volume manufacturing in Oregon, New Mexico, Ireland, Israel and China.

"This new factory will play a central role in extending Intel's unquestioned leadership in semiconductor manufacturing," Mr. Otellini said. "The transistors and chips it will produce will be the most dynamic platform for innovation that our company has ever created."

Previously, Intel announced plans to spend $6 billion to $8 billion over several years to upgrade several existing U.S. factories and build a new development facility in Oregon. These activities, announced in October, are expected to lead to 6,000 to 8,000 U.S. construction jobs during the building phase and eventually add up to 1,000 high-skilled, high-wage manufacturing jobs, Intel said.

Article didn't mention it, it's Fab 42.

 

[TuxDave]

We had instructions to not congregate outside the fabs to see Obama. hehe

 

[dmens]

We had instructions to not congregate outside the fabs to see Obama. hehe

I took off as soon as the cops and secret service started moving in yesterday.

 

[Phynaz]

Lol, how many people didn't listen?

 

[Idontcare]

We had instructions to not congregate outside the fabs to see Obama. hehe

Nice.

Ah folks, uhm, contrary to popular opinion, tomorrow's visit by the man of the people, your President, does not actually have anything to do with you peasants...this is more about us upper-crust folks.

So if ya could, you know, keep your unwashed and unkempt selves confined to the back alleys and not be anywhere anyone of any consequence might see you, then us managers and your shareholders at large would be most thankful.

TIA, and "go team!"

 

[Wingznut]

http://www.youtube.com/watch?v=0Muco-mnC3g

He actually gave a quick address from inside the fab... In street clothes! I was off on Friday, and didn't dare come near the place.

 

[wuliheron]

Is that the forth 22nm or a fifth one?

 

[IntelUser2000]

Is that the forth 22nm or a fifth one?

Umm, I don't know. They are saying its 14nm though.

http://newsroom.intel.com/community...w-factory-in-arizona?cid=rss-258152-c1-264613

 

[Mopetar]

Other sites have been reporting it as 14nm as well. Sounds yummy. Think of all of the cool 28nm parts that will be coming out this year like the newest Nvidia and AMD GPUs. 14nm is the same number of transistors in one quarter of the area.

Should allow Intel to easily fit 16 cores onto one chip. I'm assuming that this will be for the die shrink for Haswell.

 

[ElFenix]

Other sites have been reporting it as 14nm as well. Sounds yummy. Think of all of the cool 28nm parts that will be coming out this year like the newest Nvidia and AMD GPUs. 14nm is the same number of transistors in one quarter of the area.

Should allow Intel to easily fit 16 cores onto one chip. I'm assuming that this will be for the die shrink for Haswell.

wikipedia is reporting 16nm as the next node, with 11nm to follow that. not sure where 14 comes from.

 

[jimhsu]

wikipedia is reporting 16nm as the next node, with 11nm to follow that. not sure where 14 comes from.

[citation needed]

That said, to my knowledge semiconductor nodes listed in wikipedia are only full nodes. Half nodes and other things aren't present, and the node itself refers to an "average" half pitch, not a fixed design specification that every chip must follow.

 

[Mopetar]

Engadget is reporting 14 nm and the linked press release states in multiple places that 14 nm will be used.

 

[Idontcare]

[citation needed]

That said, to my knowledge semiconductor nodes listed in wikipedia are only full nodes. Half nodes and other things aren't present, and the node itself refers to an "average" half pitch, not a fixed design specification that every chip must follow.

It's worse than that...for memory IC's it is the minimum non-contacted poly-pitch (not the average, which would be much larger). For MPU IC's there is no definition or requirement in how any given company defines their node label.

They could arbitrarily call it the 16nm, the 15nm or the 14nm and it means zilch. They could call it the banana node if they wanted.

We lay-people like to think the numbers mean something, and we like to think if the label is "14nm" then that means everything is smaller than the node labeled "22nm" but there is no requirement that this has happened.

Pure marketing. GloFo could relable their 45nm node as 32nm and call it a day. They'd be the laughing stock of the industry but they would not be violating any labeling conventions if you will.

Kinda like pirate law...they be more like guidelines me matey, arrrrr!

 

[aigomorla]

so intel is pulling out of china?

Anyone else see it as this?

Other sites have been reporting it as 14nm as well. Sounds yummy. Think of all of the cool 28nm parts that will be coming out this year like the newest Nvidia and AMD GPUs. 14nm is the same number of transistors in one quarter of the area.

How did AMD and Nvidia come into this picture?

Nvidia is way behind in fab process... if Intel is walking, Nvidia, still hasnt cut the umbilical cord yet.
There not even half the league intel is at when it comes to fabs.

AMD.. sigh AMD.. lets first see a 32nm AMD chip we can all be proud about without any equal, b4 we compare fabs with intel.

 

[pm]

Ah folks, uhm, contrary to popular opinion, tomorrow's visit by the man of the people, your President, does not actually have anything to do with you peasants...this is more about us upper-crust folks.

So if ya could, you know, keep your unwashed and unkempt selves confined to the back alleys and not be anywhere anyone of any consequence might see you, then us managers and your shareholders at large would be most thankful.

TIA, and "go team!"

So I wasn't paying complete attention to the email that went out but as I recall it said it was a lottery to attend. That you put your name on the list and they would do some sort of lottery to get in. It wasn't like the quote above at all. I'm not sure why Wingz, dmens, and Tux weren't interested in attending - or maybe they wanted to and just didn't win the lottery - but it was open to "regular" employees.


As far as whichever node is what, you and I have debated this before and as I recall I agreed with you partially, but I still think that regardless of whether the dimensions actually correlate to a physical size, the size on the SRAM cell in the IEDM paper that always gets presented will be ~1/2 the size of the previous generation. So saying that it should be called something like the "banana" node might be true because they've left physical dimensions behind, but I think it's valid to call 22nm "22nm" if nothing else than the minimum SRAM cell size is ~1/2 of the size of 32nm. And likewise for "14nm". IMO, if you can pack the twice the number of transistors into the same area, then it deserves a new label.

 

[Idontcare]

So I wasn't paying complete attention to the email that went out but as I recall it said it was a lottery to attend. That you put your name on the list and they would do some sort of lottery to get in. It wasn't like the quote above at all. I'm not sure why Wingz, dmens, and Tux weren't interested in attending - or maybe they wanted to and just didn't win the lottery - but it was open to "regular" employees.

Fair enough, I wasn't really aiming to make the CEO look bad, just a little friday afternoon attempt at some humor.

As far as whichever node is what, you and I have debated this before and as I recall I agreed with you partially, but I still think that regardless of whether the dimensions actually correlate to a physical size, the size on the SRAM cell in the IEDM paper that always gets presented will be ~1/2 the size of the previous generation. So saying that it should be called something like the "banana" node might be true because they've left physical dimensions behind, but I think it's valid to call 22nm "22nm" if nothing else than the minimum SRAM cell size is ~1/2 of the size of 32nm. And likewise for "14nm". IMO, if you can pack the twice the number of transistors into the same area, then it deserves a new label.

Without question there is expectation and convention that comes with the label.

We expect there to be a roughly 50% areal scaling factor for sram. It's just not required, nor is there any such definition stipulating as much.

This fact alone is enough to surprise people as they think the numerology is suppose to be something quantified and mathematical.

The convention exists for a reason and it is a good reason, don't mistake my argumentation as being one of arguing wholesale against the use of node labels.

My point is just that people get focused on what they think are the details..."is it the 16nm node or the 14nm node!?"...when it really doesn't matter whether it gets called the 16 or the 15 or the 14nm node on paper, its what the process integration guys are engineering the device physics to be (including geometry) that matters and those guys have a whole list of requirements for minimum expectations to accomplish, one of which is the ~50% areal scaling of sram circuits.

 

[TuxDave]

I'm not sure why Wingz, dmens, and Tux weren't interested in attending - or maybe they wanted to and just didn't win the lottery - but it was open to "regular" employees.

Oh I totally wanted to go, I just found out about his visit the morning of (I don't read Circuits very often) and couldn't get into the lotto. I was thinking of an excuse to go visit some friends in RA to discuss..... anything.... and happen to walk by the auditorium.

 

[dmens]

Oh I totally wanted to go, I just found out about his visit the morning of (I don't read Circuits very often) and couldn't get into the lotto. I was thinking of an excuse to go visit some friends in RA to discuss..... anything.... and happen to walk by the auditorium.

I didn't want to go because I despise all politicians.

 

[gevorg]

A small step in the right direction. Hopefully, won't be followed by a big step in the wrong direction.

 

[RavenSEAL]

Inside the US? Wow, impressive. Kudos to intel :thumbsup:

 

[pm]

Fair enough, I wasn't really aiming to make the CEO look bad, just a little friday afternoon attempt at some humor.

Sorry, it's been noted before that my sense of humor is a bit like Star Trek's Spock.

For what it's worth, I remember being at HP when Carly Fiorina would arrive and it was a bit like your post... I was pleased that Intel was egalitarian enough to lottery off most of the seats.

My point is just that people get focused on what they think are the details..."is it the 16nm node or the 14nm node!?"...when it really doesn't matter whether it gets called the 16 or the 15 or the 14nm node on paper, its what the process integration guys are engineering the device physics to be (including geometry) that matters and those guys have a whole list of requirements for minimum expectations to accomplish, one of which is the ~50% areal scaling of sram circuits.

Ok, then I agree with you totally.

 

[CTho9305]

http://www.youtube.com/watch?v=0Muco-mnC3g

He actually gave a quick address from inside the fab... In street clothes! I was off on Friday, and didn't dare come near the place.

So, fabs are pretty loud?

 

[bryanW1995]

isn't 14nm the next step for nand flash?

 

[Wingznut]

So, fabs are pretty loud?

For sure. And the video was taken on the outside edge of the fab. Definitely more commotion as you move in.

I'm not sure why Wingz, dmens, and Tux weren't interested in attending - or maybe they wanted to and just didn't win the lottery - but it was open to "regular" employees.

I would have loved to sit in the same room as the president. I didn't even know about the lottery until after it was held. (And yes, it was open to every intel employee.) I guess what I meant by "didn't dare come near the place" is that I knew it'd be chaos, and they didn't need one more person gawking for a glimpse of our President.

 

[Wingznut]

Inside the US? Wow, impressive. Kudos to intel :thumbsup:

A big thumbs up from me, too. I don't really pay much attention to how the media or general public perceives intel, but I sure hope they are getting the recognition they deserve for this. Seems you only hear about corporations expanding, when they are going overseas.