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Intel’s HEDT Core i7-7000 Skylake-X and Kaby Lake-X Details Leaked – Launching in August 2017 For En

DrMrLordX

Lifer
Apr 27, 2000
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That information was posted in the Skylake/Kabylake thread, though it does merit its own discussion.

I believe it. It remains to be seen what Kabylake-X brings to the table. I'm also a bit curious as to who will take the bait and buy 6c Skylake-X with Coffeelake coming in Q1 2018.
 

lopri

Elite Member
Jul 27, 2002
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What is the difference between the two?

Edit: Never mind. I think I've found out what it is.
 
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DrMrLordX

Lifer
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Coffee Lake-S with 2-channel memory vs Skylake-X with 4 channels.

I remember one post from the Skylake thread that showed how Skylake-S benefits from more memory bandwidth: https://forums.anandtech.com/threads/intel-skylake-kaby-lake-thread.2428363/page-359#post-38685652
There's been much made over the advantages of running high memory clocks (or tight timings; preferably both) on Skylake/Kabylake. There haven't been that many controls to isolate bandwidth from latency, though. For example, DDR4-4266 single channel vs DDR4-2133 dual channel + identical timings. Should be same bandwidth either way, but the former would have much better latency with the same timings.

Fortunately, LGA-2066 will make it easier to test something like that.
 

pantsaregood

Senior member
Feb 13, 2011
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Is there even a reason we're distinguishing between Skylake-X and Kaby Lake-X?

On any other CPU generation, we would consider them steppings.
 

DrMrLordX

Lifer
Apr 27, 2000
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Is there even a reason we're distinguishing between Skylake-X and Kaby Lake-X?

On any other CPU generation, we would consider them steppings.
Intel chose to give them different names, and as frozentundra indicated Kabylake-X is 4c only. That's why.
 

RichUK

Lifer
Feb 14, 2005
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Kaby Lake-X has 112 TDP compared to 91 TDP on Kaby Lake-S.

I wonder if we'll see better overclocks or just better binned Kaby Lake quad cores on the new platform.
 

coercitiv

Diamond Member
Jan 24, 2014
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There haven't been that many controls to isolate bandwidth from latency, though. For example, DDR4-4266 single channel vs DDR4-2133 dual channel + identical timings. Should be same bandwidth either way, but the former would have much better latency with the same timings.
We could also use something like DDR4 3200 CL16 vs. DDR4 2600 CL13. If bandwidth is indeed more important, we should see similar scaling even with equal latency. If gains are not as expected, then latency matters as well.

Even going from 3200 CL14 to 3866 CL16 means shaving off a bit of latency.
 

krumme

Diamond Member
Oct 9, 2009
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We could also use something like DDR4 3200 CL16 vs. DDR4 2600 CL13. If bandwidth is indeed more important, we should see similar scaling even with equal latency. If gains are not as expected, then latency matters as well.

Even going from 3200 CL14 to 3866 CL16 means shaving off a bit of latency.
I agree thats one approach. I havnt seen data that shows skl is different from ib, from an architecture standpoint, in scaling with faster ram. And obviously we need to separate timings here.

Another approach is using ram with similar cost and comparing speed here?
At the end of the day performance vs cost is whats matters so perhaps its better just to compare the entire system of mb, cpu and ram using the same total cost. Then the most balanced solution can be made.
 

DrMrLordX

Lifer
Apr 27, 2000
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We could also use something like DDR4 3200 CL16 vs. DDR4 2600 CL13. If bandwidth is indeed more important, we should see similar scaling even with equal latency. If gains are not as expected, then latency matters as well.

Even going from 3200 CL14 to 3866 CL16 means shaving off a bit of latency.
We can do that now (btw you probably meant 3733 CL16 but whatevs). The sticky issue is in controlling exactly for latency, which shifts thanks to timings and clockspeeds. You can measure for latency and bandwidth with either configuration and make estimates but you're still moving both data points around simultaneously. If I recall correctly, Anandtech had a performance chart showing clockspeed vs. latency for Skylake that indicated that moving up 266 MHz in rating was the same as moving up in CL by 1, except for speed ratings below 3000 (2920). There was sort of a weak spot in the IMC where lower clockspeeds weren't getting the job done performance-wise, even with tight timings. So it wasn't strictly linear.

Basically there are two ways of going about it:

1). The one I already mentioned where you double clockspeeds, leave timings the same, and run with one less channel. That improves latency without adjusting bandwidth assuming the IMC doesn't have some critical flaw where it fails to properly utilize multiple channels.

2). Double the number of channels without adjusting timings or clockspeed; go from dual-channel DDR4-2133 CL16 to quad-channel DDR4-2133 CL16. That improves bandwidth without adjusting latency, again assuming the IMC doesn't have some flaw that makes it underperform when servicing more channels.

Technically we can already do both . . . the problem is that it's reasonable to conclude that running a Skylake or Kabylake 4c/8t chip at "normal" clockspeeds with single-channel DDR4-2133 would be a big bottleneck, so we'd get skewed results. It's also a bit difficult to run DDR4-4266 unless you get a very well-binned chip and put a lot of work into it, so . . . yeah. You could probably do DDR4-1866 vs DDR4-3733 which would not be so technically difficult. But then you've got dual-channel DDR4-1866 (and single-channel DDR4-3733) which in-and-of-itself may represent some kind of bottleneck, again producing skewed results.

X299 will let us sidestep the obvious bottlenecks, especially if we use Kabylake-X or maybe 6c Skylake-X as test subjects.
 
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coercitiv

Diamond Member
Jan 24, 2014
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btw you probably meant 3733 CL16 but whatevs
I was looking at the charts linked in a post above, took the value as an example from there. My point was that even very high frequencies allow for good enough timings as to shave a bit more latency.
 

DrMrLordX

Lifer
Apr 27, 2000
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I was looking at the charts linked in a post above, took the value as an example from there. My point was that even very high frequencies allow for good enough timings as to shave a bit more latency.
Oh okay. 3866 is actually an abnormal timing step for DDR4, as are DDR4-3600, DDR4-3333, and DDR4-2800.

"Normal" timing steps would be 2133, 2400, 2666, 2920 (often labeled 3000), 3200, 3466, 3733, 4000, and 4266

Doesn't stop RAM manufacturers from selling oddball XMP setups though.
 
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lopri

Elite Member
Jul 27, 2002
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The first question in my mind after figuring out what the difference is whether the yields are still so bad, considering these are Xeon-rejects for the most part. Kaby-X in particular is a weird offering, because I would have thought yields should improve going from Skylake to Kabylake. It would be interesting to learn the decision making process and yields throughout the Skylake-Kabylake-Coffelake transition (basically the whole 14nm lineups).

Edit: Forgot Broadwell. Broadwell-Skylake-Kabylake-Coffelake all on 14nm. It seems like forever.
 
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