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initialisation routine

R

rookie1010

Senior member
Hello

i am looking at this exception vector mapping

0x0000 0000 Reset
0x0000 0004 Undefined Instruction
0x0000 0008 Software Interrupt (SWI)
0x0000 000C Prefetch Abort
0x0000 0010 Data Abort
0x0000 0014 Reserved
0x0000 0018 IRQ
0x0000 001C FIQ

is this exception vector mapping just for ARM processor's?

i guess when you get an interrupt from your UART, it raises an IRQ, how does the program know that it has to go to 0x0000 0018?
 
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