Well... those are two completely unrelated things, but I can try to explain them.
The FSB (Front Side Bus) is what connects your CPU to the rest of the components on the motherboard (usually through a couple of bridge chips/bus arbitrators -- in most recent designs, the "north bridge" connects to the memory, and the "south bridge" to the PCI bus and any onboard controllers). Well, at least for the Pentium and AthlonXPs -- the Athlon64/Opteron has its memory controller onboard (and is directly attached to the RAM), and does not have an FSB per se (they use a HyperTransport link to connect to the other peripherals).
L2 Cache is a second-level onboard CPU cache (L1 cache would be the first level, and some processors have a third level of L3 cache). It is used to store recently-accessed data from RAM, so that if the processor needs it again, it can read it from the (very fast) cache instead of having to do a read from RAM (which is relatively slow compared to the CPU). More is better, although its impact varies greatly depending on the application and the size of the working set. Something that accesses the same data repeatedly will obviously see a much bigger benefit from a larger cache than something that constantly accesses different data.