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I'm dumb, but, how can you let the RAM run on a diffrent speed than the FSB???

The VIA chipset runs the memory bus asynchronously from the FSB. The FSB connects the Northbridge to the CPU. The memory bus runs on its own clock between the Northbridge and the memory.
 
DaddyG, thanx a lot, very simple, but clear explanation. What is the work of the Northbridge actually? Serial and Parallel ports and stuff?
 
No, the Northbridge does CPU interface, AGP interface, RAM interface, and connect to the southbridge over the PCI bus. Southbridge does everything else (IDE, USB, all the older I/O ports, Floppy Drive, AMR, onboard sound, etc).

That's why the Via 686A southbridge is on a million types of motherboards.
it does everything but AGP, RAM, CPU so you need a new northbridge for each type of CPU you want, but the same southbridge can work all the IO ports for them all.

(I'm not sure if the PCI bus is controlled by the North or South, I thnk it's sort of shared, but it's what connects the two together)
 
Noriaki has it right. The Northbridge acts like a big data gathering device. The Southbridge handles the details of all the I/O devices except AGP. The North and South do indeed communicate with the PCI bus, but its pretty much chunks of data at this time. No details to sweat. Newer Intel chipsets can also handle asynchronous memory but they don't use the North/South deal. They use a Hub architecture, communicating with its own bus. This HUB architecture first was shown with the 820 chipset, which got lots of bad press because of Rambus, but, I think that the potential in Hubs is greater than North/South.
 
I believe in Advanced Chipset Settings (in the blue screen after you hit Del at startup) there is a setting called Memory Clock: or something like that. There are two options: HOST (100MHz) and HOST+PCICLK (133MHz.
 
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