If the zen apu with HBM2 comes out...

[William Gaatjes]

I was wondering, would partitioning the hbm2 memory be a good idea ?
If the memory controller would be configured in such a way that both gpu and cpu can read write to all memory with pointers directly (zero copy). This is already possible. So, that is not an issue.

But what if the memory layout would be setup in such a way that one stack would be available for the cpu primarily to execute from and the other stacks are primarily for the gpu. With support from the os, this could result in parallel access for both cpu and gpu. Maximizing the use of the hbm2 features. Also, most memory for a gpu seems to be used for texture storage. And in the near future, m2 ssd speed will be high enough and cheap enough to stream textures in directly from the m2 ssd. This would be enough next to the always present texture caching in gpu memory.

But for a cpu to take good advantage from hbm2, would there not have to be a cache line size optimization ?
How would this work with pseudo channel ?
For the gpu there is the same issue ?

Anybody have some good thoughts ?

http://www.anandtech.com/show/10527/sk-hynix-adds-hbm2-4-gb-memory-q3

http://www.anandtech.com/show/9969/jedec-publishes-hbm2-specification

 

[TheELF]

Wouldn't hbm just be a part of the system mem the CPU has complete access to at any time anyway?

 

[The Stilt]

If AMD was to implement HBM in the APUs, then the system memory would be HBM as well. AFAIK none of the current blocks support simultaneous / mixed use of multiple memory controllers featuring different memory types. And the cost of > 8GB - 64GB of HBM isn't "exactly" cheap.

I would imagine the server "APUs" would basically have a discrete GPU, connected to the CPU via the new high speed interconnects (found in Zeppelin die) rather than anything else.

 

[Tuna-Fish]

The most credible HBM apu rumor is the one where there is a CPU and a GPU in a MCM. In that configuration, the HBM would be mainly for the GPU.

 

[William Gaatjes]

I forgot about the mcm. It makes sense to make use of mcm. That would also alleviate the temperature hot spots issue by increasing the surface area and because of two dies instead of one.
I do mean a hbm2 memory solution only for consumer use. I can imagine that for a server apu there would never be enough memory while executing all these virtual machines. But hbm2 would be overkill for a server perhaps primarily for graphics reasons ? But for HSA, some hbm2 on a server might be handy. Hbm2 would be better of use for graphics or HSA.

Is hbm2 memory suited for random non sequential memory access ?
A gpu reads and writes large blocks of memory. A cpu does not always do that.
Also, if i am not mistaken the cache hides most of the random non sequential memory access as long as the memory address needed is in the cache.
But how would hbm2 and pseudo channel work with different cache strategies like write through, write back.
What kind of cache strategy is used by zen ?
Is this ideal for use with hbm2 memory and pseudo channel ?

I can imagine, that while zen was designed a few years back, there was no idea yet of hbm2 memory.
So the first zen version would not have any possible optimization for hbm2 memory. But future versions of zen could very well have.

 

[AtenRa]

Target : Low power, cheap Laptops/Desktop
Target price : Sub $170 for top-end desktop SKU.
Target date : Early Q3 2017

I would release a 2C 4T ZEN CPU with just 12x CUs (768 shaders) VEGA iGPU at 100-120mm2 die size only.
The secret sauce is 3200MHz DDR-4 (For the desktop) with third generation color compression + 16 ROPs.

With those specs a $150 ZEN APU will be 50%+ faster than any current Kaveri APU, making it suitable for 1080p Low/Medium settings gaming in the majority of todays games at an affordable price.

No HBM2 no huge dies, High margin, high Yields and simple the best APU for both Laptop/Desktop in its segment. Intel will not have any competitive product against it at the price point.

Later in early 2018 release a 4C 8T ZEN APU with 16x CUs (1024 Shaders) and HBM2 for High performance Laptops , (Apple, HP, Lenovo etc) may be interested in such an SKU.

 

[DrMrLordX]

Is DDR4-3200 even a JEDEC standard at this point?

 

[Valantar]

Is DDR4-3200 even a JEDEC standard at this point?

No, but so what? It's not like DDR3-2400 is either, and AMD has no problem supporting that.

Target : Low power, cheap Laptops/Desktop
Target price : Sub $170 for top-end desktop SKU.
Target date : Early Q3 2017

I would release a 2C 4T ZEN CPU with just 12x CUs (768 shaders) VEGA iGPU at 100-120mm2 die size only.
The secret sauce is 3200MHz DDR-4 (For the desktop) with third generation color compression + 16 ROPs.

With those specs a $150 ZEN APU will be 50%+ faster than any current Kaveri APU, making it suitable for 1080p Low/Medium settings gaming in the majority of todays games at an affordable price.

No HBM2 no huge dies, High margin, high Yields and simple the best APU for both Laptop/Desktop in its segment. Intel will not have any competitive product against it at the price point.

Later in early 2018 release a 4C 8T ZEN APU with 16x CUs (1024 Shaders) and HBM2 for High performance Laptops , (Apple, HP, Lenovo etc) may be interested in such an SKU.

This all sounds sweet. As in yes please, I'd take one of each. Here's to hoping it's true.

 

[The Stilt]

No, but so what? It's not like DDR3-2400 is either, and AMD has no problem supporting that.

This all sounds sweet. As in yes please, I'd take one of each. Here's to hoping it's true.

No AMD product officially supports DDR3 at 2400MHz.

 

[sirmo]

I can imagine, that while zen was designed a few years back, there was no idea yet of hbm2 memory.
So the first zen version would not have any possible optimization for hbm2 memory. But future versions of zen could very well have.

HBM started its development 8-9 years ago. It's been in dev. for a long time at AMD. I am sure Zen team knew about it. Not sure how long back HBM2 spec goes, but I would image they knew.

HBM2 APUs have a potential of being something special. Power savings, space savings.. iGPU bandwidth. Would love to see it.

 

[AtenRa]

No AMD product officially supports DDR3 at 2400MHz.

True but even DDR-3 2133MHz is not JEDEC official.

 

[Valantar]

No AMD product officially supports DDR3 at 2400MHz.

2133, then. Big difference...

 

[superstition]

No, but so what? It's not like DDR3-2400 is either

Do you mean DDR4 2400?

 

[Valantar]

Do you mean DDR4 2400?

Nope, DDR3-2133. AMD has a long history of supporting RAM frequencies far above JEDEC. As does Intel, through the XMP standard. This shouldn't be controversial ...

 

[LTC8K6]

No AMD product officially supports DDR3 at 2400MHz.

Yet when they say it's faster than an Intel chip with a dgpu, they sometimes use DDR3-2400 ram...

http://www.amd.com/en-us/products/processors/desktop/a-series-apu#

A single, efficient A-series processor can deliver higher game performance on popular game titles than a competing processor combined with a discrete graphics card 5

5 Testing by AMD Performance Labs using: AMD A10-7870K with AMD Radeon™ R7 Graphics, 2x8GB DDR3-2400, 256 SSD, Windows 8.1 64 bit, Driver 14.502.

 

[AtenRa]

Yet when they say it's faster than an Intel chip with a dgpu, they sometimes use DDR3-2400 ram...

http://www.amd.com/en-us/products/processors/desktop/a-series-apu#

Even using the same speed they are faster.

 

[William Gaatjes]

HBM started its development 8-9 years ago. It's been in dev. for a long time at AMD. I am sure Zen team knew about it. Not sure how long back HBM2 spec goes, but I would image they knew.

HBM2 APUs have a potential of being something special. Power savings, space savings.. iGPU bandwidth. Would love to see it.

Aha, ok. I stand corrected.
This allows for interesting options.

 

[DrMrLordX]

No, but so what? It's not like DDR3-2400 is either, and AMD has no problem supporting that.

Well actually, it depended on your chip/board/RAM. Lots of Kaveri early adopters struggled to get DDR3-2400 running. Some had to downclock the CPU, others had to bolster NB voltage. I saved myself a lot of trouble by using an A88x-Pro.

To date AMD has not supported any DDR4 configuration in excess of DDR4-2400. I would like to think that they would use much better memory controllers in future Zen APUs compared to what we see in Bristol Ridge, but still, we don't know how far over JEDEC they're willing to go. Hopefully DDR4-4000, at least. I wouldn't count on it though.

 

[LTC8K6]

Even using the same speed they are faster.

Faster than what? We can all set up a favorable test.

 

[Valantar]

To date AMD has not supported any DDR4 configuration in excess of DDR4-2400. I would like to think that they would use much better memory controllers in future Zen APUs compared to what we see in Bristol Ridge, but still, we don't know how far over JEDEC they're willing to go. Hopefully DDR4-4000, at least. I wouldn't count on it though.

To date, AMD has not had DDR4 support in anything but an OEM platform (and some irrelevant embedded solutions). Who is surprised that these don't support non-JEDEC RAM speeds? Not me, at least. The only reasonable thing to base expectations on is previous comparable platforms, and in that case, AMD has a long history of supporting fast RAM.

 

[DrMrLordX]

Actually, Bristol Ridge could really have benefited from faster DDR4 clockspeeds. Moreso than possibly even Summit Ridge.

AMD just didn't have the budget to do anything but copy/paste much of the crappy IMC from Kaveri.

As for AMD having a long history of supporting fast RAM . . . I would say that's not true. Only BD/PD offer some hope there. Phenom II, Kaveri, Carrizo, and Bristol Ridge are all quite bad when it comes to memory clockspeed.

A lot of Deneb-era chips struggled to get past DDR3-1666. Some Thubans could hit DDR3-2000, if you were lucky. But the IMC on those chips were largely restricted to 1666 or so. You really had to push for lower timings since clockspeed just was not gonna happen.

Kaveri and newer APUs can't swing fast memory since bclk OC is mostly impractical and since higher multipliers are just not possible.

Today, AMD's best platform for supporting high memory clocks is AM3+. Good thing AM4 gets a boost from Summit Ridge soon.

 

[Valantar]

Actually, Bristol Ridge could really have benefited from faster DDR4 clockspeeds. Moreso than possibly even Summit Ridge.

AMD just didn't have the budget to do anything but copy/paste much of the crappy IMC from Kaveri.

As for AMD having a long history of supporting fast RAM . . . I would say that's not true. Only BD/PD offer some hope there. Phenom II, Kaveri, Carrizo, and Bristol Ridge are all quite bad when it comes to memory clockspeed.

A lot of Deneb-era chips struggled to get past DDR3-1666. Some Thubans could hit DDR3-2000, if you were lucky. But the IMC on those chips were largely restricted to 1666 or so. You really had to push for lower timings since clockspeed just was not gonna happen.

Kaveri and newer APUs can't swing fast memory since bclk OC is mostly impractical and since higher multipliers are just not possible.

Today, AMD's best platform for supporting high memory clocks is AM3+. Good thing AM4 gets a boost from Summit Ridge soon.

You're talking about overclocking. I'm talking about official memory speed support. Every single Kaveri/Godavari chip except for the lowly A6-7400k supports DDR3-2133 (The 7400k is "limited" to 1866). While Intel has excellent memory controllers and generally run whatever speed you want, they've never officially supported anything above DDR3-1600 on any single product. Ever. For DDR4 it's the same situation - DDR4-2133 is the only officially supported speed.

 

[superstition]

You're talking about overclocking. I'm talking about official memory speed support. Every single Kaveri/Godavari chip except for the lowly A6-7400k supports DDR3-2133 (The 7400k is "limited" to 1866). While Intel has excellent memory controllers and generally run whatever speed you want, they've never officially supported anything above DDR3-1600 on any single product. Ever. For DDR4 it's the same situation - DDR4-2133 is the only officially supported speed.

JEDEC considers DDR3 2133 overclocked, though, right? That's why, for instance, the bottlenecking DDR4-2133 standard exists in the first place — overly conservative conception of stock.

 

[superstition]

Only BD/PD offer some hope there. Phenom II, Kaveri, Carrizo, and Bristol Ridge are all quite bad when it comes to memory clockspeed.

More latency than clock:

Steamroller and Excavator have around 35% higher DRAM latency than Piledriver at the same exact settings.

 

[BeepBeep2]

A lot of Deneb-era chips struggled to get past DDR3-1666. Some Thubans could hit DDR3-2000, if you were lucky. But the IMC on those chips were largely restricted to 1666 or so. You really had to push for lower timings since clockspeed just was not gonna happen.

Around DDR3-1800 was the limit for Deneb with Elpida Hyper IC, anything else around DDR3-1866. ~DDR3-1866 for Elpida Hyper on Thuban (CL7, though CL6 at lower speed was faster), DDR3-2000+ CL7/8/9 with PSC, BBSE, or Samsung / Hynix.

On AM3+ I had a couple Bulldozer/Piledriver CPUs that could run DDR3-2133 to DDR3-2400 all day, and two that would not even POST at DDR3-2400 in dual channel.
I had a DDR3-2000 CL6-6-6 CPU-Z validation on Thuban once. Not stable whatsoever...

Fun times