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ICH5 South Bridge

A

Auric

Diamond Member
Is there any performance relationship betwixt the integrated IDE channels and SATA ports? For example, if a PATA HDD is on the Primary IDE channel are the best transfer rates to a SATA HDD achieved if it is connected to the the second SATA port?

I axe [sic] first because of the way they are represented as storage controllers in Device Manger -despite the SATA being direct native mode as opposed to remapped to IDE in CMOS Setup, the SATA controller appears as an additional Ultra ATA with corresponding Primary and Secondary IDE Channels and also I'm not sure the transfer rates are up to snuff. Both PATA and SATA drives are shown in UDMA Mode 5.
 
Nope, no such trick or restriction - except when you copy from an ACTUAL master to the slave on the same channel. In that case, the drives can only transfer alternatingly, not simultaneously.

The general problem with all Intel southbridges up to ICH5 is that their uplink to the northbridge has a rather pathetic throughput ceiling of around 250 MB/s for everything - PCI, IDE, SATA, USB, LAN, Audio.
 
The general problem with all Intel southbridges up to ICH5 is that their uplink to the northbridge has a rather pathetic throughput ceiling of around 250 MB/s for everything - PCI, IDE, SATA, USB, LAN, Audio.
Click to expand...
I'm fairly impressed with Intel's resolution to this, long in coming though it may be. Alas, its too bad Intel didn't go all the way and run it off a scalable Hypertransport.
 
Welp, I monkeyed around a bit and the transfer no longer seems wanting for speed. I had inadvertently used the generic pciide rather than intelide driver. It's not quite as dumb as you may think since the controllers were named correctly except sans an alpha-numberic suffix. I don't know if the drive could have been in a lower performance self verify mode for a number of power cycles as some new ones are.

One possible minor glitch remaining, according to SpeedFan's SMART database is the PATA drive's Offline Seek Performance of 235 is below average limits of of 239-253 (despite it reading "OK"). I'll have to check the status of my identical backup drive and mayhaps run a full diagnostics just to be anal, err, I mean sure.

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Ah so, I now notice in CMOS Setup that there are four IDE channels with 0 & 1 corresponing to the actual IDE connections and thus having Primary and Master, while 2 & 3 are the SATA ports. Knowing that would make it less likely to wonder if there was a performance relationship.

But just out of curiousity can you riddle me this: is the representation of the SATA ports as IDE channels masking a difference or is there none internal to the ICH5 which limits the configuration to two channels + two ports; could a mobo maker equip it with four ports? Did any?
 
Originally posted by: tcsenter
I'm fairly impressed with Intel's resolution to this, long in coming though it may be. Alas, its too bad Intel didn't go all the way and run it off a scalable Hypertransport.
Click to expand...

Well, they've merely gone where SiS and VIA have been for a while - to a proprietary 1GB/s link. SiS even has it multithreaded, with guaranteed bandwidth for audio and PCI.

ULi, NVidia, ATI and AMD have long put their southbridges onto Hypertransport.
 
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