IC design and manufacturing

[TurtleCrusher]

Is it possible to use the same design from a large process (45-65nm) on a newer process (32nm)? I see that some processes are capable of different substrate (or metal) levels, if the newer process had more layers involved, they would go to waste, correct?

TIA.

 

[Raghu]

Yes, they would go waste. But its not as simple as optically shrinking a design to a new node. First, the design might not be manufacturable at all, because of new design rules. Even if this were somehow ok, the design is unlikely to work because it wont meet timing requirements.

Different processes offer different max. number of metal layers. Substrate generally refers to transistor/base layer and does not change with process. Current processes only offer 1 substrate layer.

 

[TurtleCrusher]

Thanks for the clarification. I was wondering about why this isn't done in many cases. For example, ARM8 cores are still on a .25um process, probably for a reason. If they were scaled down to 22nm or so, they would be perfectly for embedded devices.

I take it nVidia is already doing this with Tegra and what not.

 

[TuxDave]

Thanks for the clarification. I was wondering about why this isn't done in many cases. For example, ARM8 cores are still on a .25um process, probably for a reason. If they were scaled down to 22nm or so, they would be perfectly for embedded devices.

I take it nVidia is already doing this with Tegra and what not.

I assume cost and access to 22nm is one huge barrier especially since I would assume ARM8 cores are sold at a very low price. After you get after that problem, THEN the design teams can go whine about the process but they'll get it done. 🙂

 

[Raghu]

Chip cost is generally proportional to die area, for mature processes. For 22/28nm though, it will be much higher since its still cutting edge.

Die size for simple designs can often be pin limited too, rather than logic limited. Chip might need 300 pins, and bump/packaging technology hasnt scaled as aggressively as transistor. So the die size for a simple A8 processor might not be as small as possible with 22nm. If you are going to waste silicon area, then might as well do the fab on an older and cheaper process.