Hynix teases new High-End GPU with GDDR6 in early 2018

[Arachnotronic]

On NVIDIA's earnings call, an analyst asked JHH if he thought Vega would change the competitive landscape in 2H 2017. JHH said he doesn't expect it will.

I think this is a good hint that GV104 is coming in 2H 2017.

 

[tviceman]

On NVIDIA's earnings call, an analyst asked JHH if he thought Vega would change the competitive landscape in 2H 2017. JHH said he doesn't expect it will.

I think this is a good hint that GV104 is coming in 2H 2017.

Either that, or Vega simply won't match 1080 TI and since it'll be bigger and be strapped with really expensive memory, JHH knows the $699 and $499 1080 TI and 1080 price points are safe.

 

[Bacon1]

, an analyst asked JHH if he thought Vega would change the competitive landscape in 2H 2017. JHH said he doesn't expect it will.

Because he would ever reply with "We have no counter to it and it will destroy our sales :'("? Of course he is going to say he doesn't expect it to hurt his company, saying otherwise would harm their stock.

 

[w3rd]

AMD and Hynix co-developed HBM and submitted the technology to JEDEC to be adopted as an industry standard. Once JEDEC adopted the technology its not under AMD's control. Its under JEDEC's control. Samsung and Hynix are manufacturing HBM2 graphics memory. Nvidia has wisely chosen GDDR5X for consumer Pascal and GDDR6 for consumer Volta as these graphics memory technologies are easily manufacturable in high volume and do not have cost / yield / volume issues which HBM/HBM2 face. GP100 and most likely GV100 are HBM2 based and sell in ultra high margin datacenter products and also sell in much lower volumes than consumer Pascal or Volta.

*cough*

Umm, the spec being under JEDEC's control has ZERO to do with production contracts. And how many HBM2 chips did you say Nvidia has bought from Samsung..?

Consequently, Nvidia had to choose GDDR5x, it has no choice.

 

[Grubbernaught]

*cough*

Umm, the spec being under JEDEC's control has ZERO to do with production contracts. And how many HBM2 chips did you say Nvidia has bought from Samsung..?

Consequently, Nvidia had to choose GDDR5x, it has no choice.

Or is it even remotely possible they chose GDDR5x because it is cheaper, doesn't need an interposer and is readily available.

Nah, far more likely it's because AMD is stingy. Good work.

 

[raghu78]

On NVIDIA's earnings call, an analyst asked JHH if he thought Vega would change the competitive landscape in 2H 2017. JHH said he doesn't expect it will.

I think this is a good hint that GV104 is coming in 2H 2017.

I think Volta could very well bring a repeat of the market domination by Nvidia that we saw during Maxwell generation. Its unfortunate that AMD has fallen so far behind in terms of GPU generation launches that Vega has to face Volta instead of Pascal. For the past 3+ years since Maxwell launched Nvidia has just kept on growing absorbing all the growth in PC gaming and pretty much sucking all the margins and profits out of the GPU industry leaving AMD to feed on low margin left overs. imo Nvidia has run too far away from AMD for them to catch up.

 

[beginner99]

Quite right, Titan Xp 384-bit GDDR5X already has more bandwidth than the still unreleased HBM2 Vega (as rumoured). Unless AMD color compression has now not only caught up, but outright passed Nvidia, it's just one more disadvantage.

Bandwidth isn't everything. AFAIK hbm has granular access. Similar to NAND where you have to rewrite a whole block even when only writing 1 byte if you have to get a minimum amount of data for each request even if you need less you use up more bandwidth than actually required.

EDIT:

I have to correct my self as in HBM has finder granularity compared to bandwidth. A single GDDR5 chips has finer graularity but at much, much lower bandwidth. Meaning with hbm you can access the same small amount of data with much higher bandwidth. And for sure some data is accessed much more often than others as for example intels edram solutions show.

 

[Erenhardt]

Bandwidth isn't everything. AFAIK hbm has granular access. Similar to NAND where you have to rewrite a whole block even when only writing 1 byte if you have to get a minimum amount of data for each request even if you need less you use up more bandwidth than actually required.

EDIT:

I have to correct my self as in HBM has finder granularity compared to bandwidth. A single GDDR5 chips has finer graularity but at much, much lower bandwidth. Meaning with hbm you can access the same small amount of data with much higher bandwidth. And for sure some data is accessed much more often than others as for example intels edram solutions show.

Who's gonna fix the table now? I was like F it! (╯°□°）╯︵ ┻━┻
Looking at the cracked LCD laying on the floor, I now see your edit...

 

[T1beriu]

HBM2 was only adopted by nVidia, because AMD allowed it. As they help co-develop the technology and have exclusive rights to HBM2 [...] AMD locked them out of HBM2 with exclusive rights.

Nvidia is allowed to use HBM2 in small quantities in the enterprise market. That's the deal.

You're very misinformed. Please bring a source to prove me wrong.

 

[Headfoot]

HBM2 was only adopted by nVidia, because AMD allowed it. As they help co-develop the technology and have exclusive rights to HBM2, which is why AMD is in no hurry with Vega and why the 1080ti & Titan Xp were released so sudden. Also why nVidia has to seek GDDR5x, because AMD locked them out of HBM2 with exclusive rights.

Nvidia is allowed to use HBM2 in small quantities in the enterprise market. That's the deal.

Fabricated out of thin air. This is utter and complete nonsense.

 

[LTC8K6]

Micron Discusses GDDR: 16 Gbps GDDR5X, 16 nm GDDR6 and GDDR5