The technical design is that both will be active at their highest speeds. So the CDRW will be detected and active at PIO4, while the CDROM will be at UDMA-33 (UDMA5 by the way is ATA100; UDMA-33 is UDMA mode 2).
The limitation will be felt when you're trying to use both drives at once (whether they're trying to communicate with each other or not). With any IDE implementation, only one device can be active at a time (communicating with the controller). During that time the other device cannot do anything. Since the PIO4 device is slower, it will take longer for it to complete an operation. Therefore the DMA33 device is sitting and waiting a longer time. By contrast, the DMA33 device will finish an operation faster, so the PIO4 device gets access again faster.
However I think the limitation is going to be small. Mainly PIO4 is higher CPU usage than UDMA mode. Since a CDRW isn't able to burn faster than even a PIO4 burst to it's cache, it's not going to need to have access longer than it takes to burst a couple of megs of data into the drive's cache. You might notice it with reading large amounts of data from the CDRW, but again the actual throughput of streaming data is slower than the PIO4 capability.