How are chips made radiation resistant?

[bryanl]

NASA wants a new generation of space-rated chips and is looking to 130nm designs:

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How are chips this small made radiation resistant, other than by putting them into radiation-blocking enclosures?

 

[pm]

There's a wikipedia article here..

Beyond the brute force process techniques mentioned in the "Radiation-hardening Techniques" section with regards to process technology, you can widen the gates of transistors and basically "beef-up" your storage nodes by making them larger (and a bit slower and more power hungry) than normal. This effectively adds electrons to the storage elements - which makes the energy requirements to "flip a bit" much higher, and thus less statistically likely. Beefing up everything will slow it down but can be very effective. There are some process techniques which can improve the charge carrying capabilities of a storage element - but they are also costly in terms of power and speed (they make the circuits effectively slower and hotter).

Fabbing a design in GaAs can be an effective way to radiation harden it - but this is a difficult conversion and can be costly in terms of design time and fab costs. SOS (silicon on sapphire) is more commonly used (and cheaper) and SOI (silicon on insulator) is cheaper than SOS but not as effective.

Beyond this, the logic techniques mentioned in the wikipedia entry are commonly used - parity and ECC checking of storage cells - and using multiple redudant chips in parallel to compute the answers of several CPU's and then relying on the answer from the majority of them. Eg, if two out of three CPU's think that the output is a "1" and the other thinks it's a "0", then the "1"s win and the output is judged to be a "1".

 

[CanOWorms]

In addition to what is in the Wikipedia article, depending on the type of device they are using, using Flash-based devices rather than SRAM would provide more protection from types of radiation.

For example, a Flash or antifuse based programmable device would be less susceptible than an SRAM-based FPGA.

 

[imported_Ned Flanders]

How about SOL (Silicon on Lead) production? 😛

 

[Agent11]

I read an article a few years ago about new radiation suits that use salt.. so there are alternatives to lead 🙂

 

[pm]

Actually lead solder was the source of most radiation that hit chips back when it was in common use. Lead is not a good solution. 🙂 At least not without a good way to remove 210Pb from the lead. (See: "The ?discovery? of alpha activity in lead and solder", Ron Brodzinski, Journal of Electronic Materials, vol. 29, Issue 10, Pages: 1294 - 1298 )

 

[johnpombrio]

I have seen EMP "hardened" printed circuit boards for jet aircraft. They put a bunch of metal around the chips like a faraday cage.