Sorry for the double post, but here it goes:
from thread http://forums.anandtech.com/messageview.cfm?catid=28&threadid=680756
Actually I was the one who has been trying in vain for the last few weeks to bring it to everybody's attention, especially to those who claim in their "in-depth" reviews (including anandtech) that MP and XP have some documented differences. There are at least 3 documented differences, and not one single reviewer ever bothered to check the MP's and XP's specifications. As I said in the letter below, the differences might be cosmetic, but unless someone clarifies the documented differences, one cannot claim that "The current Athlon MPs that are officially validated for dual processor operation are actually no different than their Athlon XP desktop counterparts."
Below is a letter I sent to anand on 12.25.01
-------------------------------------------------------------------------------------------------------------------------------
Date: Tue, 25 Dec 2001 20:17:42 -0800 (PST)
Subject: There is at least one more (significant) difference between MP and XP based on AMD's documentation
To: anand@anandtech.com
"The current Athlon MPs that are officially validated
for dual processor operation are actually no different
than their Athlon XP desktop counterparts.
There is one small exception to that statement and
that is in regards to the L1 bridges on the most
recent CPUs that implement the new organic packaging.
As we pointed out in our Athlon XP 1900+ article, the
L1 bridges on desktop CPUs are actually cut from the
factory while MP CPUs aren't cut, the bridges simply
aren't connected."
The previous statement I quoted from your article is
the currently, accepted belief, but I believe it is
wrong based on AMD's documentation. If you carefully
examine XP and MP whitepapers you will notice that MP
has 8 SCHECK pins which are listed in both the Logic
System Diagram and also in the Pin Description. The
XP doesn't list these pins in the Logic System
Diagram, and also lists these 8 corresponding pins as
NC, "Not Connected". The SCHECK pins are related to
ECC functionality. If you need more info, I can send
you links to specific AMD documents, and also to the
research I have done so far, that describes in details
the difference which is strictly based on AMD's
documentation. I wish I could further examine this
difference at the hardware level, but I'm limited by
my hardware (I only have a s2460, 2x1600MP).
For the last couple of weeks, I've been trying to get
the AMD/SMP community (newsgroups, amd specific sites,
smp specific sites) involved and look into this
technical difference, but there seems to be no
interest.
This second difference might turn out to be a cosmetic
difference, but because it is related to a significant
functionality of the processor I believe it might turn
out to be a significant difference. Also, if this
second "difference" is overlooked by either Tyan or
AMD at the expense MP's stability, it would be in the
public's interest to be infomed.
I hope you do look into this difference, not only from
a technical perspective, but also from a hardware
perspective.
Thanks for your time,
---------------------------------------------------------------------------------------------------------------------
Some new developments:
1. Two different sources (first source a second-hand source from AMD - on 2cpu, the second source using a multimeter - on hardocp) have "verified" that the pins are indeed "connected". That would imply that the XP specs are wrong!!!!
2. There is no news on the missing FID_Change state in MP/organic.
3. Sandra does not report correctly the ECC option on S2460
4. I tried a new approach: compare using wpcredit the "PCI Bus : 0 Vendor ID: 1022 Device : 0 Device ID: 700C Function: 0 Revision : 11 Host Bridge" between an S2460 using 2MPs and 2XPs. Assuming you are using the same box, if the registers using the MPs are identical to the registers using 2 XPs, then you can say that the 762 bridge cannot differentiate between MP and XP, therefore MP and XP are identical. Unfortunatelly I only have the MPs, and I only received one reply from someone using 2XPs.
I found 16 registers which were different but I narrow it down to three registers which might be different due to different CPUs. The other 13 are due to different hardware (different video card, memory in different location, etc).
Bios options for both systems were SERR and ECC disabled:
The three different registers are:
offset 0x04 bit 8:
System Error Enable
offset 0x18 bit 7:
Reserved bits, not documented - different in XP and MP
offset 0x50 bit 20:
Fixed bit (Read Only), defined in the docs as "P transitor strength Value - ... The P value are active low"
The most interesting one is 0x50 bit 20 because it is a Read Only bit, and it was different between my MP box and the XP box. Why?
I could not verify this any further because no one else send their wpcredit output.
Again, the ideal test would be for someone with 2MPs and 2XPs (same speed), compare the registers using the same hardware.
Some links:
http://forums.2cpu.com/showthread.php?s=&threadid=12155
http://forums.2cpu.com/showthread.php?s=&threadid=12259
There are some more threads I started on amdmb.com, 2cpu.com, hardocp.com, tyan news group.
from thread http://forums.anandtech.com/messageview.cfm?catid=28&threadid=680756
Actually I was the one who has been trying in vain for the last few weeks to bring it to everybody's attention, especially to those who claim in their "in-depth" reviews (including anandtech) that MP and XP have some documented differences. There are at least 3 documented differences, and not one single reviewer ever bothered to check the MP's and XP's specifications. As I said in the letter below, the differences might be cosmetic, but unless someone clarifies the documented differences, one cannot claim that "The current Athlon MPs that are officially validated for dual processor operation are actually no different than their Athlon XP desktop counterparts."
Below is a letter I sent to anand on 12.25.01
-------------------------------------------------------------------------------------------------------------------------------
Date: Tue, 25 Dec 2001 20:17:42 -0800 (PST)
Subject: There is at least one more (significant) difference between MP and XP based on AMD's documentation
To: anand@anandtech.com
"The current Athlon MPs that are officially validated
for dual processor operation are actually no different
than their Athlon XP desktop counterparts.
There is one small exception to that statement and
that is in regards to the L1 bridges on the most
recent CPUs that implement the new organic packaging.
As we pointed out in our Athlon XP 1900+ article, the
L1 bridges on desktop CPUs are actually cut from the
factory while MP CPUs aren't cut, the bridges simply
aren't connected."
The previous statement I quoted from your article is
the currently, accepted belief, but I believe it is
wrong based on AMD's documentation. If you carefully
examine XP and MP whitepapers you will notice that MP
has 8 SCHECK pins which are listed in both the Logic
System Diagram and also in the Pin Description. The
XP doesn't list these pins in the Logic System
Diagram, and also lists these 8 corresponding pins as
NC, "Not Connected". The SCHECK pins are related to
ECC functionality. If you need more info, I can send
you links to specific AMD documents, and also to the
research I have done so far, that describes in details
the difference which is strictly based on AMD's
documentation. I wish I could further examine this
difference at the hardware level, but I'm limited by
my hardware (I only have a s2460, 2x1600MP).
For the last couple of weeks, I've been trying to get
the AMD/SMP community (newsgroups, amd specific sites,
smp specific sites) involved and look into this
technical difference, but there seems to be no
interest.
This second difference might turn out to be a cosmetic
difference, but because it is related to a significant
functionality of the processor I believe it might turn
out to be a significant difference. Also, if this
second "difference" is overlooked by either Tyan or
AMD at the expense MP's stability, it would be in the
public's interest to be infomed.
I hope you do look into this difference, not only from
a technical perspective, but also from a hardware
perspective.
Thanks for your time,
---------------------------------------------------------------------------------------------------------------------
Some new developments:
1. Two different sources (first source a second-hand source from AMD - on 2cpu, the second source using a multimeter - on hardocp) have "verified" that the pins are indeed "connected". That would imply that the XP specs are wrong!!!!
2. There is no news on the missing FID_Change state in MP/organic.
3. Sandra does not report correctly the ECC option on S2460
4. I tried a new approach: compare using wpcredit the "PCI Bus : 0 Vendor ID: 1022 Device : 0 Device ID: 700C Function: 0 Revision : 11 Host Bridge" between an S2460 using 2MPs and 2XPs. Assuming you are using the same box, if the registers using the MPs are identical to the registers using 2 XPs, then you can say that the 762 bridge cannot differentiate between MP and XP, therefore MP and XP are identical. Unfortunatelly I only have the MPs, and I only received one reply from someone using 2XPs.
I found 16 registers which were different but I narrow it down to three registers which might be different due to different CPUs. The other 13 are due to different hardware (different video card, memory in different location, etc).
Bios options for both systems were SERR and ECC disabled:
The three different registers are:
offset 0x04 bit 8:
System Error Enable
offset 0x18 bit 7:
Reserved bits, not documented - different in XP and MP
offset 0x50 bit 20:
Fixed bit (Read Only), defined in the docs as "P transitor strength Value - ... The P value are active low"
The most interesting one is 0x50 bit 20 because it is a Read Only bit, and it was different between my MP box and the XP box. Why?
I could not verify this any further because no one else send their wpcredit output.
Again, the ideal test would be for someone with 2MPs and 2XPs (same speed), compare the registers using the same hardware.
Some links:
http://forums.2cpu.com/showthread.php?s=&threadid=12155
http://forums.2cpu.com/showthread.php?s=&threadid=12259
There are some more threads I started on amdmb.com, 2cpu.com, hardocp.com, tyan news group.
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