[hexus]Google, HPE, Oracle back RISC-V, an open source ARM alternative

[monstercameron]

http://hexus.net/tech/news/cpu/89195-google-hpe-oracle-back-risc-v-open-source-arm-alternative/

...RISC-V processors can currently be used to run Linux and NetBSD. Support for other OSes is planned for the coming year. There are six open CPU designs currently available which include the 64-bit 'Rocket' and five 'Sodor' CPUs. However, at the time of writing there is only one commercial shipping product using a RISC-V baded SoC, a digital camera. During the upcoming workshop, FPGA-based accelerators using embedded RISC-V cores will be under discussion....

I just got on the arm train...now riskV sounds good too.

 

[ShintaiDK]

Another product to fix something that isn't broken. I say it doesn't have a chance to become anything.

 

[Ajay]

It'll make a great research and development tool at the graduate university level (sort of like Linux was/is). It fixes somethings 'technically' broken in ARM, but ARM is anything but broken commercially. In fact, obviously, it's such a huge commercial success that it's giving the 'mighty' Intel fits.

 

[Arachnotronic]

In fact, obviously, it's such a huge commercial success that it's giving the 'mighty' Intel fits.

Understatement of the week ARM is the world's most popular ISA.

 

[VirtualLarry]

Open Hardware? Sounds good to me!

 

[III-V]

Open Hardware? Sounds good to me!

The ISA is open, not sure if any of the designs are. You are basically free to create a processor that uses the RISC-V ISA, but all of the CAD files and whatnot that you'd send to a fab for any existing RISC-V design aren't going to be publicly available AFAIK.

Open source hardware is a thing, though. A very, very small "thing."

 

[Arachnotronic]

Open Hardware? Sounds good to me!

Who gives a crap

 

[Tuna-Fish]

Another product to fix something that isn't broken. I say it doesn't have a chance to become anything.

RISC-V has different goals than x86 than ARM. It's designed to be easy to modify and implement at very disparate power/performance points and amounts of physical resources. It's chiefly a research vehicle. If something dramatically new and better is created, it's likely to be implemented and tested first on RISC-V. (Then, later, it will be implemented on ARM and x86 where it will actually be used.)

RISC-V will also likely take over a lot of the performance/power consumption + backwards compatibility don't matter areas like consumer routers, as once implementations will become widely available it will likely be cheaper than any alternative.

 

[VirtualLarry]

The ISA is open, not sure if any of the designs are.

There are six open CPU designs currently available

??

Open source hardware is a thing, though. A very, very small "thing."

Well, it's not quite yet to the point that some hobbyist would be able to fab one in an easy-bake oven, but I'm hopeful for the future. Maybe 3D nano-printers for circuits and semi-conductors.

 

[jhu]

SPARC and POWER are fairly open too. Why not use one of those?

 

[monstercameron]

Older sparc cores were under the gpl iirc, AFAIK companies still don't like gpl..

 

[III-V]

??

Maybe I should RTFA.

 

[dark zero]

Older sparc cores were under the gpl iirc, AFAIK companies still don't like gpl..

And how about Power? Is pretty decent.

 

[DrMrLordX]

RISC-V will also likely take over a lot of the performance/power consumption + backwards compatibility don't matter areas like consumer routers, as once implementations will become widely available it will likely be cheaper than any alternative.

So it's going to push into MIPS' turf?

SPARC and POWER are fairly open too. Why not use one of those?

I'm not sure that wide core designs like that are going to be suitable for the stuff Tuna-Fish discussed above. I guess there could be stripped-down POWER chips with fewer "chiplets" or whatever, but the base memory/cache control logic would still have to be there in one form or another.

 

[fkoehler]

People seem to be somewhat ignorant of what RISC V is about.

If you take the time to even skim http://riscv.org/faq.html#lic

9. How fast are RISC-V processors compared to x86 or ARM processors?

This depends entirely on the quality of the implementation, including microarchitectural design, circuit design, and process technology used. We believe there are no fundamental reasons that a RISC-V implementation should be less efficient than x86 or ARM, and indeed that the ISA design should enable implementations to be somewhat more efficient than either.
10. Are RISC-V processors lower power than ARM processors?

This depends entirely on the quality of the implementation, but we feel RISC-V implementations should be at least comparable in energy efficiency to ARM cores built in the same microarchitectural style and with the same engineering effort in the same process technology. In one point of comparison, the RISC-V Rocket core is twice as energy efficient as the most similar ARM implementation, the Cortex-A5.

There are also things like Minions, SIMD, etc that are currently or planned to be available in the Open Source images.

Having an ARM-like low power/moderate-high IPC Core with a License cost of $0 will only make the RISC V a magnet for R&D investment dollars.

One of the really nice things is that they have done a clean-sheet ISA. Check out the Goals on the bottom half of this page: http://riscv.org/

If you are only interested in HEDT, then stop reading now.

 

[ShintaiDK]

Remember cost. Both hardware and software. Hence I dont see it being able to compete with MIPS or ARM in any way. A solution for a problem that doesn't exist.