HAMMER CHIPSET - What specs will the OPTERON debut with?

[MadRat]

I'm guessing that the initial Opteron will come with chipset on par with or a notch above the current norm:

North bridge:

Hypertransport link to CPU's integrated memory controller
DDR333 dual-channel support
4DDR slots for total of 4GB memory support (*grin*), using registered modules (512MB non-reg.)
Memory Interleaving by default (via CPU memory controller)
8X AGP
fanless operation

South bridge:

ATA133-compatibility
both USB 2.0 and 1394 support
IDE RAID support
333MHz link between north and south bridges


Post your specs for what you think the chipset will include!

 

[odog]

serial ATA is one feature i think is necessary.

besides that the 81XX series is very impressive, and something i am looking forward to.

 

[ST4RCUTTER]

I don't think it will have quite those specs. Here's my take:

There is no real "Northbridge". The AGP tunnel will support 8X with 6.4GB/s throughput to the AMD8151. The Southbridge (AMD8111) will support up to 800MB/s, integrated NIC, integrated sound (AC97') and USB 2.0.

What I'm not sure on is if all three chips are needed. The (AMD8131) is a PCI-X tunnel. My understanding is that this will be the successor to the (8151) chip or will only be used when PCI-X is to be implemented on the motherboard. All chips should be fanless or passively cooled...

The Athlon64(?) will not have a dual DDR memory controller. You will have to pick up an Opteron later in 03' for that.

 

[CQuinn]

I thought the integrated memory controller on the opteron only supports two slots?

 

[MadRat]

No, not two slots, the integrated controller supports two HT links. You can branch off a single memory controllers from each HT link, or to a massive array of memory controllers. The memory addressing is all juggled inside the CPU, which is a change from the chipsets of old. The external memory controllers need only pass on the physical memory address range to the CPU's controller if I understand it correctly. This is faster because the older CPU designs operated by contacting the memory controllers across a shared bus and relied on the chipset to regulate the physical memory addressing of memory chips.

If I understand right then this is the first AMD chipset that will support chip kill, too.

 

[AMDfreak]

ST4RCUTTER said

The Athlon64(?) will not have a dual DDR memory controller. You will have to pick up an Opteron later in 03' for that.

Good call there. This something that we will have to be careful about since there will be Sledgehammer Opterons and Clawhammer Opterons and Clawhammer Athlons. The only ones that will have the dual channel DDR controller are the "server" Sledgehammer Opterons. If I can save enough money, I'm gonna VapoChill a couple of those bad boys.

 

[jayboal]

BTW, with the hypothetical dual-channel memory bus, 4X512MB is really 2X(2X512 per channel) for a total of 2GB system RAM, not 4GB.

 

[robg1701]

Yes, but if you read what he says again youll find thats not what he said...

 

[Athlon4all]

Well, since the topic is Opteron, I've got a present for ya!!! Here is a shot of the inside of a Dual Sledge Hammer Opteron system enjoy!!!!

 

[robg1701]

Holy Crap !!

Do i see a dual opteron system with 2 * 8DIMM dual channell memory banks ? :Q
Thats good for more than 10GB/s of memory bandwidth...weeeeeeee

 

[MadRat]

They aren't dual-channels but separate channels by the looks of the picture. The HAMMER family can share memory and cache information directly between CPUs, meaning that separate banks of memory can be controlled by each CPU then DIRECTLY shared across the whole system. Interesting concept when you really think about it.

 

[robg1701]

Yes, its 2 sepeate allocations of memory, one per processor, i understand that and the way hammer can use the seperate memory's perfectly which was why i said its 2 lots of 8DIMM dual channel memory banks.....since it was a dual opteron system (and supposing that this was a * sledgehammer * opteron, which isnt stated) the fact that each group of memory has 2 dimms used could be indactive that its dual-channel as well , cause this certainly aint gonna be a home-user/low-end dually kinda board is it, just a tad more than you get with a 760MP(X), so it could be a good base for showing sleges on....

 

[ST4RCUTTER]

What's especially interesting to me, and motherboard manufacturers (I'm sure) is the low number of traces due to the serial nature of Hypetransport. This should significantly reduce manufacturing costs and open up realestate for other uses...

 

[kuk]

My guess is that the AGP tunnel will eventually be integrated into the southbridge (SiS being the first manufacturer to do that ).

 

[NFS4]

DROOL

 

[AGodspeed]

Hehe, nice pic Athlon4all.

 

[AMDfreak]

*DROOL*

Doh!, there goes another keyboard.....