Good papers to read?

[CTho9305]

I read this (interesting stuff), and started trying to read this, but I'm going to need an intro to more advanced branch predictors... stuff beyond simple arrays of saturating counters before I'll be able to understand it. Got any recommendations? Unrelated papers on other computer-architecture stuff are of course also welcome 😉.

 

[Lynx516]

Link

Chip architect has many articles on architecture.

Intel paper

might be interesting as well

 

[Shalmanese]

These are always worth a read: http://www.acm.org/classics/

 

[Sohcan]

Some of the seminal papers on dynamic branch prediction:

A Study of Branch Prediction Strategies
Two-level Adaptive Training Branch Prediction
Combining Branch Predictors

Some other papers for which you'll probably need an ACM Portal subscription to find:
S. T. Pan, K. So, and J. T. Rahmeh - "Improving the accuracy of dynamic branch prediction using branch correlation"
J.K.L. Lee and A.J. Smith - "Branch prediction strategies and branch target buffer design"
T. Y. Yeh and Y. N. Patt - "Alternative implementations of two-level adaptive branch prediction"
T. Y. Yeh and Y. N. Patt - "A comparison of dynamic branch predictors that use two levels of branch history"
A. Seznec and F. Bodin - "Skewed associative caches"

 

[CTho9305]

Originally posted by: Sohcan
Some of the seminal papers on dynamic branch prediction:

A Study of Branch Prediction Strategies
Two-level Adaptive Training Branch Prediction
Combining Branch Predictors

Some other papers for which you'll probably need an ACM Portal subscription to find:
S. T. Pan, K. So, and J. T. Rahmeh - "Improving the accuracy of dynamic branch prediction using branch correlation"
J.K.L. Lee and A.J. Smith - "Branch prediction strategies and branch target buffer design"
T. Y. Yeh and Y. N. Patt - "Alternative implementations of two-level adaptive branch prediction"
T. Y. Yeh and Y. N. Patt - "A comparison of dynamic branch predictors that use two levels of branch history"
A. Seznec and F. Bodin - "Skewed associative caches"

Awesome, thanks 🙂. If I had the time, I'd draw up a little tree of what papers are prerequisits for what other papers for understanding 😉.

Lynx516: The chiparchitect guy doesn't seem to know the difference between "then" and "than"... and a lot of stuff on that site seems to be "educated speculation". The intel paper is interesting though 🙂.

edit: is Two-level Adaptive Training Branch Prediction describing the predictor eventually used in the PPro and Pentium MMX? (I'm on page 4... this question could be answered later in the paper as the system becomes more clear 😉.
edit2: Yes, it is. The "Combining Branch Predictors" paper explained what gselect and gshare are, and I guess describes tournament predictors. 😎

 

[CTho9305]

Originally posted by: Sohcan
J.K.L. Lee and A.J. Smith - "Branch prediction strategies and branch target buffer design"

I couldn't find this one. Got more? While doing the ACM searches, I found a lot of other potentially interesting stuff - I'll have to look more carefully later 🙂.

edit: So, it looks like CMU does have a portal, but they don't mention it ANYWHERE, and I only found out about it through student pages.

 

[Lynx516]

Yup the chip architect site does have alot of speculation but is usually correct. They are interesting reads if you want to know what is PROBABLY in the next CPUs