Gigabyte P45 mobo with G.Skill RAM

[youngsatchmo]

I have heard some people from the Gigabyte tech support forum that when 2x2GB dual-channel memory is used, you have to manually tweak the voltage setting for the memory.

Is that true? Have you experienced problem with this mobo-memory combo?

Thanks in advance.

 

[LOUISSSSS]

with my gigabyte board and gskill ddr2 ram i have no incompatibility problems. i did, and always will set voltage manually in the bios. you should also

 

[youngsatchmo]

If the memory works with the mobo at the default auto voltage setting, why should I tweak it?

 

[exar333]

A lot of this is due to overclocked RAM not posting at the default 1.8v (as defined by Jedec). Almost all 5-5-5-X DDR2-800 should post just fine at this voltage, but as you increase the speed and/or decrease the timings, it may not do so. What LOUISSSSS is saying is that if you are running the speeds and/or timings of the memory, you should match the voltage in the BIOS to follow suit.

If you get "plain-Jane" RAM at slow latencies and it runs at the default 1.8v, it really wont matter. But as you get into the higher-performance RAM, it could make a big difference on if your memory is running stable or not.

 

[KingstonU]

Originally posted by: LOUISSSSS
set voltage manually in the bios. you should also

I got 2x2Gb of G.Skill on ASUS P45 and it kept crashin until I checked G.Skill's website to see that my RAM needs 2.0-2.1 Volts to operate and so I manually changed it from the standard 1.8 Volts in the BIOS and Voila! no more problems. takes 10 seconds to fix.

 

[youngsatchmo]

Good to hear. I think my RAM requires 1.9 V, and they're 4-4-4-12.

So I'll adjust the setting in BIOS accordingly. Thanks again.

 

[Drsignguy]

In my sig, I have PC8000 (1000Mhz) GSkill with my Gigabyte P45 and it works just fine. It doesn't however mention GSkill as being supported. So when I bring up Cpu-z it says max bandwidth of 400Mhz and also brings up the part numbers for the GSkill but it clocks/Overclocks just like it should.