- Apr 25, 2003
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Originally posted by: Mingon
It has a fsb of sorts, the nforce3 uses a 600mhz fsb (or HT link) and the otherboards have 800mhz HT link.
Originally posted by: sickcamry
Originally posted by: Mingon
It has a fsb of sorts, the nforce3 uses a 600mhz fsb (or HT link) and the otherboards have 800mhz HT link.
Is that for the nForce3 150 or nForce3 Pro? Or both?
If both, will it be changed in the upcoming nForce3 250 chipset?
Originally posted by: Caveman
I don't get it... The gaming benchmark clearly show the SIS solution is a pig (beat soundly by nforce 3) yet it gets high marks for speed from Anand.
?????
Originally posted by: Mingon
It has a fsb of sorts, the nforce3 uses a 600mhz fsb (or HT link) and the otherboards have 800mhz HT link.
Originally posted by: alexruiz
Originally posted by: Mingon
It has a fsb of sorts, the nforce3 uses a 600mhz fsb (or HT link) and the otherboards have 800mhz HT link.
No, it is NOT a FSB.....
In older/current CPU architectures, the only path from the CPU to exchange data with the rest of the system is to the chipset..... Yes, you got it right, it is called the FSB. The chipset takes care of the memory, the graphics card and the peripherials.
For the AMD64 architecture, the CPU has now 2 paths to exchange data with the rest of the system. One of those paths is the memory controller, whose bandwidth is dedicated exclusively to the RAM (in a FSB architecture not all of the FSB bandwidth is to the RAM, as a portion could be for AGP or peripherials depending on what the CPU is doing at that moment). The other path to exchange data with the world is the Hypertransport Tunnel (HT link) , which communicates with the chipset for AGP and peripherials.
The memory controller operates at the designated speed for the kind of memory used (DDR400 max as of now). The HT tunnel operates at 800 Mhz bidirectional. The total CPU bandwidth is the sum of the memory bandwidth plus the HT bandwidth. In the case of the athlon 64 it is 3.2 GB/s (memory) + 6.4 GB/s (HT) equalling 9.6 GB/s total CPU bandwidth. For the Athlon 64 FX it is 6.4 GB/s + 6.4 GB/s = 12.8 GB/s.
Personally, I don't think that a HT tunnel operating at 1GHz will make that much of a difference compared to a 600 Mhz one.... With the exception of the video card, there is nothing really on the chipset side that requires enormous amounts of data bandwidth.... what would be really nice is the memory controller being capable to run PC4000 DDR (DDR500). This would effectively negate ANY advantage taken by the rival camp with the DDR2 533.
So, in summary, get used to forget the term FSB when taking about the AMD64 chips.
Alex
Originally posted by: alexruiz
Originally posted by: Mingon
It has a fsb of sorts, the nforce3 uses a 600mhz fsb (or HT link) and the otherboards have 800mhz HT link.
No, it is NOT a FSB.....
In older/current CPU architectures, the only path from the CPU to exchange data with the rest of the system is to the chipset..... Yes, you got it right, it is called the FSB. The chipset takes care of the memory, the graphics card and the peripherials.
For the AMD64 architecture, the CPU has now 2 paths to exchange data with the rest of the system. One of those paths is the memory controller, whose bandwidth is dedicated exclusively to the RAM (in a FSB architecture not all of the FSB bandwidth is to the RAM, as a portion could be for AGP or peripherials depending on what the CPU is doing at that moment). The other path to exchange data with the world is the Hypertransport Tunnel (HT link) , which communicates with the chipset for AGP and peripherials.
Originally posted by: Mingon
Originally posted by: alexruiz
Originally posted by: Mingon
It has a fsb of sorts, the nforce3 uses a 600mhz fsb (or HT link) and the otherboards have 800mhz HT link.
No, it is NOT a FSB.....
In older/current CPU architectures, the only path from the CPU to exchange data with the rest of the system is to the chipset..... Yes, you got it right, it is called the FSB. The chipset takes care of the memory, the graphics card and the peripherials.
For the AMD64 architecture, the CPU has now 2 paths to exchange data with the rest of the system. One of those paths is the memory controller, whose bandwidth is dedicated exclusively to the RAM (in a FSB architecture not all of the FSB bandwidth is to the RAM, as a portion could be for AGP or peripherials depending on what the CPU is doing at that moment). The other path to exchange data with the world is the Hypertransport Tunnel (HT link) , which communicates with the chipset for AGP and peripherials.
As I said it has one of sorts. look at via implementation on the dual boards, for the second cpu to access the memory it has to go via the first cpu it cannot go direct. So whilst it is not a true FSB it is capable of functioning as one because the on die controller can be disabled.
Originally posted by: aRCeNiTe
Originally posted by: alexruiz
Originally posted by: Mingon
It has a fsb of sorts, the nforce3 uses a 600mhz fsb (or HT link) and the otherboards have 800mhz HT link.
No, it is NOT a FSB.....
In older/current CPU architectures, the only path from the CPU to exchange data with the rest of the system is to the chipset..... Yes, you got it right, it is called the FSB. The chipset takes care of the memory, the graphics card and the peripherials.
For the AMD64 architecture, the CPU has now 2 paths to exchange data with the rest of the system. One of those paths is the memory controller, whose bandwidth is dedicated exclusively to the RAM (in a FSB architecture not all of the FSB bandwidth is to the RAM, as a portion could be for AGP or peripherials depending on what the CPU is doing at that moment). The other path to exchange data with the world is the Hypertransport Tunnel (HT link) , which communicates with the chipset for AGP and peripherials.
The memory controller operates at the designated speed for the kind of memory used (DDR400 max as of now). The HT tunnel operates at 800 Mhz bidirectional. The total CPU bandwidth is the sum of the memory bandwidth plus the HT bandwidth. In the case of the athlon 64 it is 3.2 GB/s (memory) + 6.4 GB/s (HT) equalling 9.6 GB/s total CPU bandwidth. For the Athlon 64 FX it is 6.4 GB/s + 6.4 GB/s = 12.8 GB/s.
Personally, I don't think that a HT tunnel operating at 1GHz will make that much of a difference compared to a 600 Mhz one.... With the exception of the video card, there is nothing really on the chipset side that requires enormous amounts of data bandwidth.... what would be really nice is the memory controller being capable to run PC4000 DDR (DDR500). This would effectively negate ANY advantage taken by the rival camp with the DDR2 533.
So, in summary, get used to forget the term FSB when taking about the AMD64 chips.
Alex
So the FSB of the A64 is 600 or 800mhz?![]()
Originally posted by: JeremiahTheGreat
Originally posted by: Caveman
I don't get it... The gaming benchmark clearly show the SIS solution is a pig (beat soundly by nforce 3) yet it gets high marks for speed from Anand.
?????
If you bothered to look carefully, its actually an ATHLON FX + nF3 which is often at the top of the charts (and not by much) with the SIS + A64 chipset coming right behind it...
Originally posted by: alexruiz
Originally posted by: Mingon
Originally posted by: alexruiz
Originally posted by: Mingon
It has a fsb of sorts, the nforce3 uses a 600mhz fsb (or HT link) and the otherboards have 800mhz HT link.
No, it is NOT a FSB.....
In older/current CPU architectures, the only path from the CPU to exchange data with the rest of the system is to the chipset..... Yes, you got it right, it is called the FSB. The chipset takes care of the memory, the graphics card and the peripherials.
For the AMD64 architecture, the CPU has now 2 paths to exchange data with the rest of the system. One of those paths is the memory controller, whose bandwidth is dedicated exclusively to the RAM (in a FSB architecture not all of the FSB bandwidth is to the RAM, as a portion could be for AGP or peripherials depending on what the CPU is doing at that moment). The other path to exchange data with the world is the Hypertransport Tunnel (HT link) , which communicates with the chipset for AGP and peripherials.
As I said it has one of sorts. look at via implementation on the dual boards, for the second cpu to access the memory it has to go via the first cpu it cannot go direct. So whilst it is not a true FSB it is capable of functioning as one because the on die controller can be disabled.
This is because the motherboard manufacturers chose it this way to save money.... and that is wrong. FSB is dead for the AMD64 architecture.
Originally posted by: Mingon
Unless they decide to release DDR2 based boards before AMD does or rambus based boards.
Deleted nested posts....
Not going to happen... The dual channel Athlon 64 FX has a comfortable lead over the competition in memory bandwidth.....![]()
