FSB me baby!

[swifty3]

For all u techies out there, what is the single biggest limiting factor in increasing the FSB speeds to much higher numbers, say 1 Ghz.??

 

[rimshaker]

.... memory speeds never reaching that high.... yet

 

[Howard]

The clock speed of system memory comes first, although PCI devices aren't too far off. Some just can't handle high bus speeds.

 

[AndyHui]

Clock skew, and expense.

The faster the timings, the more difficult it is to maintain a uniform clock signal (ugh...what a horrible way to put it). You need more layers on the motherboard and far more expensive components to maintain stability at higher speeds.

 

[CTho9305]

<< Clock skew, and expense.

The faster the timings, the more difficult it is to maintain a uniform clock signal (ugh...what a horrible way to put it). You need more layers on the motherboard and far more expensive components to maintain stability at higher speeds. >>



Another issue is the speed of light / electricity. 186,000 miles per second works out to 12767040000 inches per second. At one billion cycles per second (1GHz), you can't go more than 12.7 inches. Now, you can't get electric signals to propagate that fast, so its even less than this in practice.

 

[Evadman]

Cool, my board is 12.6 Inches. Can I overclock it? 🙂

Sorry, had to get that out'a my system.

We seem to be coming up on the limit of light speed pretty fast. We will soon need a FTL field, like the one's they have in Star Trek in the ocmputer cores. I have seen that Scientists have been able to slow down light, but can they speed it up? That is the question.

<edit>
I just noticed your Sig line CTho9305, I added that when he posted it too, but do not have enough space left over in my Sig to add his name 🙁
</edit>

 

[Heisenberg]

<< We seem to be coming up on the limit of light speed pretty fast. We will soon need a FTL field, like the one's they have in Star Trek in the ocmputer cores. I have seen that Scientists have been able to slow down light, but can they speed it up? That is the question.
>>



Nope, you can't speed light up. Unless the current theories are wrong, the speed of light is the speed limit (there are ways around that, but that's another discussion entirely).

Work is being done on using a phenomenon called quantum entanglement to transmit information instantly, but it's in a very early stage. Some pretty cool advances have been made recently, though.

That will probably be the direction CPU construction takes when the engineers finally run out of tricks 😉 and hit a wall, but that won't be for quite some time.

 

[CTho9305]

<<

<< We seem to be coming up on the limit of light speed pretty fast. We will soon need a FTL field, like the one's they have in Star Trek in the ocmputer cores. I have seen that Scientists have been able to slow down light, but can they speed it up? That is the question.
>>



Nope, you can't speed light up. Unless the current theories are wrong, the speed of light is the speed limit (there are ways around that, but that's another discussion entirely).

Work is being done on using a phenomenon called quantum entanglement to transmit information instantly, but it's in a very early stage. Some pretty cool advances have been made recently, though.

That will probably be the direction CPU construction takes when the engineers finally run out of tricks 😉 and hit a wall, but that won't be for quite some time. >>



God does not play dice with the universe! 😉
(just in response to your name)

well, for now, you could do what the P4 does, and have some drive stages that serve to get information across longer distances while still allowing a shorter clock. This would allow a 2GHz, foot-long motherboard if you had a buffer in the middle. Basically a pipelined bus.

 

[highwire]

We are very close to the maximum now for single clocked data based on turn around delay. There is no more than a 2 to 1 improvement factor left for response speed, no matter how fast the chips. I.E. latency due to propagation delay.
However, using various techniques, the burst data transfers can continue to increase given enough $$$ and silicon to, I would guess, the high gigs, maybe 10 GHz. Skew can be overcome by clocking each data line in in serial fashion.

Good Grief! RDRAM? Maybe it can be done without stepping into a Rambus patent cow pie.