AMD Ryzen (Summit Ridge) Benchmarks Thread (use new thread)

[itsmydamnation]

Its going to be interesting to see single thread branchy int code performance ( like spec gcc)

 

[coercitiv]

Its going to be interesting to see single thread branchy int code performance ( like spec gcc)

AMD is so proud of their prediction and prefetch algorithms that they gave them some goofy marketing names that likely puts them out of touch with reality. (how they really work)

That having been said, Lisa also mentioned on important thing: improvements in prediction and prefetch are responsible for around 1/4 of the IPC boost from their previous gen.

Later edit:

Also, for those interested in power consumption, during the Blender demo the two systems consumed roughly the same amount of power, with Zen having the edge. 100Mhz more for Zen and the two systems would have been evenly matched as far as power is concerned.

It's important to note this and also think about the reasons why in this benchmark Zen @ 95W TDP is matching the power consumption of 6900K @ 140W TDP. Ryan Shrout at PcPer was asking this on Twitter, and Ian Cutress, Ashrah Eassa and Dresdenboy joined in the conversation and brought two valid reasons:

1. Memory load, BDW-E can go further than what we saw in the bench, and that obviously has a power usage cost. (bench system was dual channel)
2. Intel TDP takes into account the more (power) expensive AVX2 instructions.

The takeaway from this demo is very interesting, since it puts Zen roughly on the same footing with BDW-E as far as frequency/power is concerned, but also shows how important it is to understand the effect of uncore and instruction sets on power usage and TDP.

 

[rtsurfer]

They promise a 3.4G+ base clock & people are still worried if it will hit 4G.

Sigh....
Somethings never change..

Sent from my Nexus 5X using Tapatalk

 

[IllogicalGlory]

Just don't be surprised when the hype train meets reality and it turns out AMD has carefully cherry picked these benchmarks to build up the hype.

Great comment! Never seen that perspective before.

 

[AtenRa]

Now that i think about the lower TDP vs Broadwell-E, this gives AMD the opportunity to have more cores at the same TDP vs Intel Broadwell XEONs.
This is a huge advantage for Cloud clusters and if performance per core is very close to Broadwell-E in a variety of applications, it will not be unreasonable to expect that they will eventually get a nice double figure Server market share in 2017-2018.

 

[itsmydamnation]

It's funny amd are showing benchmarks where there design can be exposed to its greatest weaknesses which is its it's 1/2 load store width of haswell yet it's keeping up. They haven't even benchmarked the area where they should see the biggest improvement vs excavator branchy integer code.

Also on the i5 front it has 1/2 it's die size given to a gpu your not using so who knows where amd will price the 4 and 6 core.

8 core at Intel 6 core price
6 core at quad i7 price
4 core with ht @ i5 price

That would put the cat amongst the pigeons and make amd plenty of money.

 

[coercitiv]

Also on the i5 front it has 1/2 it's die size given to a gpu your not using so who knows where amd will price the 4 and 6 core.

Turns out the future wasn't fusion after all.

 

[AtenRa]

It's funny amd are showing benchmarks where there design can be exposed to its greatest weaknesses which is its it's 1/2 load store width of haswell yet it's keeping up. They haven't even benchmarked the area where they should see the biggest improvement vs excavator branchy integer code.

Also on the i5 front it has 1/2 it's die size given to a gpu your not using so who knows where amd will price the 4 and 6 core.

8 core at Intel 6 core price
6 core at quad i7 price
4 core with ht @ i5 price

That would put the cat amongst the pigeons and make amd plenty of money.

Well the iGPU in 4C8T Skylake die is more like 40% of the total area but yea, according to this a 4C8T ZEN could start at $200

 

[PhonakV30]

I actually tested this at the time the first 6900K vs. Zen demo came out. Dual channel was MARGINALLY faster

did you read thread over OCN?

http://www.overclock.net/t/1617227/...iew-on-12-13-at-3-pm-cst/640_40#post_25710833

also here :
http://www.overclock.net/t/1617227/...iew-on-12-13-at-3-pm-cst/520_40#post_25710462

That's not the discrepancy being pointed out.

The 6900K in the AMD demo is scoring 35.44 seconds at 3.4GHz.

So far, one 6900K clocked at 4.2GHz using the file is scoring 42 seconds. Same CPU, same OS, AMD specified Blender version, AMD test...25% higher clock speed, 15% worse performance.

This also corresponds exactly to what I'm seeing on my 5820K and 6800K. I've been using Blender for ten years, it scales almost perfectly linearly with core clocks and number of cores, but not it, and not anything, scales much better than linearly.

A 6900K has the same architecture as my 6800K but has 33% more cores. With a 33% OC on my 6800K, I should score nearly the same as a stock 6900K. With a 33% OC, my 6800K scores 51-52 seconds. Same goes for my 5820K, same clock, almost the same score because almost the same architecture.

Anyone with a stock 6900K who uses the file AMD has for download will get ~52 seconds. Not the ~36 seconds AMD's demo 6900K is showing.

What cause of this ? wrong file?

 

[CatMerc]

Two options:
A. AMD used a build with AVX256, which apparently lines up with the scores
B. AMD used a lower sample rate (from 200 to 100), which again lines up with the scores

 

[CatMerc]

Mystery solved. I managed to extract a clear enough image from PCPer's video, and although I could clearly see 100 from just zooming in, I did my best to enhance the image.

 

[bakyt115]

http://www.sweclockers.com/nyhet/23072-amd-summit-ridge-med-arkitekturen-zen-heter-ryzen

clearly see samples -> render set to 100

 

[Seba]

I did my best to enhance the image

 

[Tuna-Fish]

AMD performing better than SKL I'll have to see. From what I remember, the architecture isn't all that exotic.

OoO window: HSW level.
Loads: HSW/SKL.
Stores: HSW.
Scheduler entries: SKL.
Register: SKL.

The big difference is the wider retire, wider fetch and higher bandwidth of uops from uop cache. I suspect that they mostly help in highly threaded loads.

Their branch predictors are also based on entirely different designs than the Intel ones. Whether they are better is still an open question.

 

[itsmydamnation]

4 narrower SIMD units is also interesting.
The stack engine generating memory addresses (is there any stack cache in the end?)
And the l/s system looks like a pretty big departure ( but who knows what Intel does)

 

[bjt2]

So, does anyone expect it can break 4 ghz?

FX 8370E was a 32nm SOI part at 95W and was clocked 3.3 base and 4.3 turbo. Zen is said, by AMD, to draw same power per core at same clock respect to excavator, that is in turn more efficient than the FX 8370E.
Zen base clock should be at least 3.4Ghz, so we can expect single core turbo at least 4.4GHz, about as much as I said some day ago (4.5GHz turbo max)...

 

[bjt2]

4 narrower SIMD units is also interesting.
The stack engine generating memory addresses (is there any stack cache in the end?)
And the l/s system looks like a pretty big departure ( but who knows what Intel does)

The stack engine has a "MEMFILE" as AMD calls it.
There were AMD papers and patents for a sort of L0 cache for the stack, mainly to save power (but in this case also to increase performance, since this frees the AGUs and the L1D)...
So I think that yes, the stack engine should have a cache.

 

[bjt2]

They promise a 3.4G+ base clock & people are still worried if it will hit 4G.

Sigh....
Somethings never change..

Sent from my Nexus 5X using Tapatalk

They are especting 3.4GHz base and 3.425 single core turbo, just to stay under the beloved intel chips...

 

[bjt2]

The big difference is the wider retire, wider fetch and higher bandwidth of uops from uop cache. I suspect that they mostly help in highly threaded loads.

Their branch predictors are also based on entirely different designs than the Intel ones. Whether they are better is still an open question.

According to last Agner Fog PDF even skylake have still a 16 bytes/cycle fetch bandwidth. I thought that this was corrected, but evidently INTEL thinks that the uop cache could backup the most.
Since K7 (and with BD and obviously ryZen), AMD have 32 bytes/cycle. If the decoders are smart/fast enough, this can be an advantage over INTEL.

 

[DrMrLordX]

So, does anyone expect it can break 4 ghz?

If the rumours are true, the 8c/16t parts can hit 4.3 GHz on air.

Turns out the future wasn't fusion after all.

So the future is . . . hyperbolic time chambers?!?

 

[ShintaiDK]

Two options:
A. AMD used a build with AVX256, which apparently lines up with the scores
B. AMD used a lower sample rate (from 200 to 100), which again lines up with the scores

A stock 6700K(4Ghz plain) scores below 39. The delta to a 8 core 3.2Ghz 6900K with 34-35 seconds simply doesn't match up.

Also the load is very light and a low IPC load. Uses around 60-65W on my 6700K. Its about as great as the GPU limited gaming they did or the seriously rigged Dota 2.

 

[itsmydamnation]

looks at that REAR GUARD ACTION now explain x264..................


also whats your memory clocked at for the 6700k?

 

[majord]

do those screenshots say V 2.77 ? I can't quite read it.. Cat: Enhance!

Thought someone posted some footnotes saying 2.78a

 

[ShintaiDK]

also whats your memory clocked at for the 6700k?

2400Mhz.

A 3930K gets 34 seconds with the 100% setting.

Shame AMD couldn't even come clean on something they told the public to test. Some things never change.


Threadcrapping and flamebaiting is not allowed.
Markfw
Anandtech Moderator

 

[itsmydamnation]

do those screenshots say V 2.77 ? I can't quite read it.. Cat: Enhance!

Thought someone posted some footnotes saying 2.78a

looks like 2.77 to me good catch.. wonder if there is much difference. but could that be from the other demo they gave to press?