- Jan 30, 2003
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So, the rough understanding I had years ago (correct me if I'm wrong on any of this) was that as the die continued to shrink chip manufacturers would be forced to up the voltage to keep the flow of electrons(?) stable on the pathways between the transistors. That was supposed to be the ultimate barrier in speed advances because the die could only shrink so much until heat got out of control due to the voltage increases.
But now it seems like each shrink in die size (65nm to 45nm for example) yields cooler, lower voltage processors. So, what am I missing here?
But now it seems like each shrink in die size (65nm to 45nm for example) yields cooler, lower voltage processors. So, what am I missing here?